Abstract:
Sigma Delta is one of the most leading ADC for low frequency high resolution application. It works on concept of oversampling and noise shaping. Theoretically, Sigma Delta ADC can be designed for any resolution. But practically resolution is limited by many different factors. The most important factor in limiting the resolution is transfer function of system. The relative location of poles and zero affects the system’s performance and stability. Hence, in order to design a stable system transfer function must be calibrated. The main emphasis of this work is to find a stable transfer function for sigma delta ADC and then implement this on circuit level. A novel technique based on particle swarm optimization is proposed to find stable transfer function in ADC. The circuit level realization of sigma delta is done based on this transfer function and a layout is designed according the circuit. The circuit level realization includes fully differential Opamps because of their noise cancellation property. A Double tail comparator is used because of its low offset and less stacking. The resolution of ADC is 14 bit on OSR 256. But considering Noise in testing and PCB designing, the resolution is taken to be 13 bit. The top level modeling is also done for CIC Decimation filter. There many different techniques for pass band improvement, stop band improvement are explored. A CIC filter specification is obtained along with its compensator using this modeling. CIC is realized based on physical design flow, because numbers of transistors are very high in its realization. Then both of these layouts are merged on IC Compiler and results are verified on Hsim.
