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MODELING AND SIMULATION OF DUAL-GATE OTFTs AND THEIR APPLICATIONS IN DIGITAL CIRCUIT DESIGN

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dc.contributor.author Goswami, Vidhi
dc.date.accessioned 2024-02-19T06:27:12Z
dc.date.available 2024-02-19T06:27:12Z
dc.date.issued 2013-06
dc.identifier.uri http://localhost:8081/xmlui/handle/123456789/15613
dc.description.abstract In this report, electrical behavior of dual gate and single gate organic thin film transistors (OTFTs) is investigated using Atlas 2-D numerical device simulation. Compared to the single gate (SG), dual gate (DG) organic transistor shows improved performance due to the presence of two channels formed in DG device by charge carrier modulation. A substantial improvement of 40%, 67%, 2 10% and 46% is observed in mobility, ON-current, current ON-OFF ratio and transconductance respectively. Further, this report introduces all-p organic inverter circuits with diode-load and zero-kgs-load logic configurations using SG and DG structures. Static and dynamic behavior of all-p organic inverter circuits is compared to address the effect of both the devices. A maximum voltage gain (As) of 16 is obtained in zero- Vgs-load logic using DG OTFT whereas SG OTFT configuration produces a maximum A of about 6.27. Significant improvement in propagation delay of 66% of diode-load and 53% for zero- Vg.c-load logic using DG as compared to SG OTFT are obtained. Furthermore, 2-input NOR gates are also implemented using these inverter circuits and their characteristics are compared. 1)G ZVLL configuration proves to be outperforming in NOR Gate design. en_US
dc.description.sponsorship INDIAN INSTITUTE OF TECHNOLOGY ROORKEE en_US
dc.language.iso en en_US
dc.publisher IIT ROORKEE en_US
dc.subject Organic Thin Film Transistors en_US
dc.subject NOR Gate Gesign en_US
dc.subject Atlas 2-D Numerical Device Simulation en_US
dc.subject DG Device en_US
dc.title MODELING AND SIMULATION OF DUAL-GATE OTFTs AND THEIR APPLICATIONS IN DIGITAL CIRCUIT DESIGN en_US
dc.type Other en_US


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