CRITICAL EVALUATION OF FRINGE CAPACITANCE IN MULTI FIN FINFET AND ITS PROCESS PARAMETER EVALUATION

Abstract

FinFET has emerged as a prominent device which can substitute the bulk MOSFET, as we tend towards the Sub-45nm technology. In FinFET there is a less short channel effects due to better controllability of gate over the channel. In this dissertation report, I have discussed why we need an alternative devices for MOSFET, advantages of scaling, disadvantages of scaling, different short channel effects arises from scaling of device such as Drain Induced Barrier Lowering, Velocity saturation, hot carrier effects, channel length modulation, punch through etc. Then I have discussed the principle of operation of MOSFET as the working of FinFET devices is same as working principle of MOSFET. Then I have described a brief history of multi-gate MOSFET. I have also described the FinFET structure of both double gate and triple gate FinFET, variation of doping in the FinFET, basic approach for the fabrication of FinFET, silicidation, and different architecture of gate and source/drain geometry. Finally, I have derived analytic modelling of fringing capacitances of faceted FinFET using conformal mapping technique and plotted the dependence of fringing capacitance on different parameters such as fin spacing and compare it with the non-faceted FinFET.