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INVESTIGATION OF DEVICE ENGINEERED INNOVATIVE TUNNEL FETs FOR IMPROVED PERFORMANCES

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dc.contributor.author Bagga, Navjeet
dc.date.accessioned 2022-03-20T12:15:09Z
dc.date.available 2022-03-20T12:15:09Z
dc.date.issued 2019-06
dc.identifier.uri http://localhost:8081/xmlui/handle/123456789/15343
dc.guide Dasgupta, S.
dc.description.abstract Technologicaldevelopmentofthesemiconductorindustryisprimarilydependedonthe miniaturization ofexistingCMOStechnologywithoutaffectingitsproperfunctionalityor in otherwords,morefunctionalityperunitareaofsilicon.However,thepowerconstraints and ever-increasingleakagecurrentinscaledtransistorshaspromptedtheresearchonin- ventivesteepslopedevices.Amongtheemergingdevices,TunnelFieldEffectTransistor (TFET) isoneofthemostpromisingandpotentialcandidateswhichcouldbeapossible successor toMOSFET.DuetothevirtueoflowOFFcurrentandsteepsubthresholdslope, TunnelFETscanbeusedforlowpowerapplications.Inspiteofhavingsuchadvantages, TunnelFETssufferfromtheproblemofambipolarconduction,lowONcurrentandhigher Miller capacitance.ManyliteratureshavereportedstructuralandmaterialengineeredTunnel FETs; however,extensiveresearchisstillrequiredforbetterdeviceperformance.Inorderto improvethedevicecharacteristics,wehaveproposedfourdistinctnovelTunnelFETstruc- tures inthisthesiswithproperphysicaljustifications,optimization,andcomparisonwiththe existingavailableliterature. WeproposedalinetunnelingbasedTwoSourceRegion(TSR)TunnelFETinwhich the effectivetunnelingoccursatthejunctionofthechannelandboththesourceregions. The proposeddeviceisasilicon-on-insulator(SOI)basedstructurethatcomprisesadrain pad overwhichboththesourceregionsandchannelareformed.Awell-calibratedsimula- tion setuphasbeenusedtoobtaintheresultsoftheproposedstructure.Wealsoexplained the possibleprocessflowtofabricatetheproposedstructure.Theacquiredresultsarecom- pared withtheearlierreportedL-shapedTunnelFETandwehavefound 63% reduction in turn-onvoltagewith 100 timesimprovementin ION=IOFF. Thedevicedimensionsand other parametersareoptimizedwithappropriatereasoningtoimprovetheperformanceof the proposeddevice. Literature surveyofTunnelFETssuggeststhatthepointtunnelingisnotadominant mechanism asitoccursonlyinthelocalizedareanearthesurface.Totakethisintocon- sideration, wehavechosenagate-all-aroundstructuretoimprovetheONcurrentincaseof point tunneling.WeproposedaGateAllAroundSchottkyJunctionTunnelFETwithHeav- ily DopedPocket(GAASJ-HDP)inwhichtheSchottkyJunctionhasbeenformedatthe source-channel interface.TheexistenceofSchottkyJunctionsupportstogetasteeptunnel- ing widthandinturn,increasethetunnelingcurrent.Theresultsoftheproposedstructure are comparedwithaconventionalgate-all-around(GAA)TunnelFETandwehavefound 15x improvementinONcurrent.Theimpactofheavilydopedpocket(HDP),stacked gate-oxideandchannellengthvariationintheproposedstructurehavealsobeendiscussed in detail.Furthermore,theconceptofunder-lapandthedualmetalgatehasbeenincluded in theproposedstructuretoinvestigatetheperformanceintermsofambipolarcurrent.In continuation, wedemonstratedaworkfunctionengineeredGateAllAroundTripleMetal (GAATM)TunnelFETwhichcomprisesofagateelectrodewiththreemetalsofdifferent i workfunctionconnectedincascade.Thechoiceofworkfunctionofthreedifferentmetals enhances theelectricfieldatthesource-channeljunctionwhichincreasestheONcurrent. Moreover,thedifferenceinworkfunctioncausesaformationofapotentialbarrierinthe channel whichobstructsthereversetunnelingandinturnreducestheambipolarcurrent.An analytical modeloftheproposeddevicehasbeenpresentedbyusingPoisson’sEquationand Kane’sModelandfoundtohaveagoodagreementwiththesimulationdata.Toemploythe device-circuitco-design,weproposedandinvestigatedanovelTwofoldTunnelFET(TF- TFET). TheproposedTF-TFETisanadmixtureofbothn-andp-typeTunnelFETsandthus a singledeviceactsasaninverter.Thisinturnreducesthetransistorcountindesigningof anycircuit.Thedrainregionofn-andp-typeTunnelFETsareshortedinternallywhichpro- vides anadditionalintrinsiccapacitancethatcomesinserieswiththeparasiticcapacitance of individualTunnelFET.Asaresult,wefound 4x reductionintheoverallMillercapac- itance ascomparedtotheMillercapacitanceofaconventionalTunnelFETbasedinverter. In addition,wehaveexploredthedynamicandstaticbehavioroftheTF-TFETinverterand also designedanXORgateand2:1MUXbyusingtheproposedTF-TFET.Inthisway,we haveacquiredthepossiblesolutionsbydemonstratingfourdistinctstructureswhichprovides better performancesofTunnelFETsintermsofhighONcurrent,lowambipolarcurrentand reduced Millercapacitance.Theoutlineoftheworksuggeststhattheproposeddevicescan be usefultothedeviceandcircuitengineerstoachieveimprovedperformancesofTunnel FET devices. en_US
dc.description.sponsorship Indian Institute of Technology Roorkee en_US
dc.language.iso en. en_US
dc.publisher I.I.T Roorkee en_US
dc.subject Technological Development en_US
dc.subject Available Literature en_US
dc.subject Around Schottky Junction en_US
dc.subject Electrode en_US
dc.title INVESTIGATION OF DEVICE ENGINEERED INNOVATIVE TUNNEL FETs FOR IMPROVED PERFORMANCES en_US
dc.type Thesis en_US
dc.accession.number G28745 en_US


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