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DESIGN OF SWITCHED CAPACITOR BASED LOW PASS SIGMA DELTA MODULATOR

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dc.contributor.author Patluri, Bindu
dc.date.accessioned 2014-11-28T10:26:22Z
dc.date.available 2014-11-28T10:26:22Z
dc.date.issued 2008
dc.identifier M.Tech en_US
dc.identifier.uri http://hdl.handle.net/123456789/11926
dc.guide Saxena, A. K.
dc.guide Dasgupta, S.
dc.description.abstract The need to develop cost effective high resolution converters which can be integrated on the same chip along with the digital circuits led to the use of sigma-delta modulator (16,1\4). For the on-chip integration of these modulators design of EAM at low supply voltages becomes necessary. In audio and biomedical applications, low pass EOM is used. For implementing these modulators, Switched Capacitor (SC) technique is widely used due to its compatibility with the standard CMOS technology its ability to realize accurate signal processing function. The design of these modulators at low supply voltages of 1 V is challenging in terms of analog circuit performance. The design of low pass second order /AM at low supply voltage of 1 V has been presented in this dissertation. Behavioral modeling of the SC EOM using SD toolbox was done and simulated in Matlab and Simulink environment optimise SNR at architecture level and also to obtain the required circuit level specifications for achieving > 10 bits resolution. The nonidealities where reduced by proper selection and designing of circuit topologies. Two stage opamp has been used to account for reduction of magnitude and phase error of the integrator transfer function due to finite gain. Integrator has been designed to minimize distortion and charge injection. Dynamic latched comparator has been employed for power reduction. This modulator employs Auto-Zeroed Integrator for operation at high frequencies by eliminating the critical switches. This can be used to digitize electrical biomedical signals like Electro-cardiogram (ECG), Electroencephalogram (EEG), and Electroretinogram (ERG). The simulated results of the proposed /AM in standard CMOS 0.18 gm technology, using Tanner tools gave about 10 bits resolution for input at 4 kHz and clock frequency of 1 MHz with 1 V power supply. en_US
dc.language.iso en en_US
dc.subject ELECTRONICS AND COMPUTER ENGINEERING en_US
dc.subject CAPACITOR en_US
dc.subject DELTA MODULATOR en_US
dc.subject DESIGN OF SWITCHED en_US
dc.title DESIGN OF SWITCHED CAPACITOR BASED LOW PASS SIGMA DELTA MODULATOR en_US
dc.type M.Tech Dessertation en_US
dc.accession.number G14333 en_US


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