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DESIGN AND IMPLEMENTATION OF INTRUSION DETECTION SYSTEM WITH FPGA

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dc.contributor.author Kumar, Arun
dc.date.accessioned 2014-11-28T10:01:17Z
dc.date.available 2014-11-28T10:01:17Z
dc.date.issued 2008
dc.identifier M.Tech en_US
dc.identifier.uri http://hdl.handle.net/123456789/11889
dc.guide Joshi, R. C.
dc.description.abstract In this work design and implementation of Intrusion Detection System (IDS) with Field Programmable Gate Array (FPGA) is presented. Today's network security systems require high-performance as well as good functionality with the growing speed of the internet. But most'of the software-based Network Intrusion Detection Systems (e.g. Snort) show inefficiency and even fail to perform for the faster internet. We have presented a fully hardware based system to overcome these shortcomings of software-based solutions. By implementing complete intrusion detection system on FPGA with embedded processor, we can solve the problem of performance and it has capability of intrusion detection in multigigabit network environment. en_US
dc.language.iso en en_US
dc.subject ELECTRONICS AND COMPUTER ENGINEERING en_US
dc.subject FPGA en_US
dc.subject INTRUSION DETECTION SYSTEM en_US
dc.subject NETWORK ENVIRONMENT en_US
dc.title DESIGN AND IMPLEMENTATION OF INTRUSION DETECTION SYSTEM WITH FPGA en_US
dc.type M.Tech Dessertation en_US
dc.accession.number G13942 en_US


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