Abstract:
A method has been developed for determining component values and transistor dimensions for CMOS operational amplifiers (op-amp). Design objectives and constraints are specified as functions of design variables. The various design variables that are widely used in operational amplifier parameters like Common mode rejection ratio (CMRR), open loop gain, slew rate, Power Supply Rejection Ratio (PSRR) are designed. This approach gives robust designs i.e. designs guaranteed to meet specifications for a variety ofprocess conditions and parameters.
In operational amplifier circuit at moderate gain and frequency there is a good agreement between actual and ideal performance. As gain and /or frequency are increased certain op-amp limitations come into play that effect circuit performance. Calculation of these limitations can be done with proper understanding of internal structure and the processes used to fabricate the op-amp. Design of device parameters is done by considering specification of these limitations.
Simulation study has been done using T-spice at .8um technology node. The theoretical calculations are in well agreement with the simulated output.
