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| Issue Date | Title | Author(s) | Research Supervisor/ Guide | Type |
|---|---|---|---|---|
| 2012 | CROSSTALK AVOIDANCE IN RLC MODELED INTERCONNECTS USING LOW POWER ENCODER | Babu, Gunti Nagendra | Kaushik, B. K.; Bulusu, Anand | M.Tech Dessertation |
| 2012 | MECHANICAL STRESS AWARE GATE TIMING MODEL FOR COMBINATIONAL LOGIC CELLS | Vundavalli, Sandeep | Bulusu, Anand; Dasgupta, Sudeb | M.Tech Dessertation |