Please use this identifier to cite or link to this item: http://hdl.handle.net/123456789/9672
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dc.contributor.authorGupta, Ajay Kumar-
dc.date.accessioned2014-11-20T05:31:27Z-
dc.date.available2014-11-20T05:31:27Z-
dc.date.issued2000-
dc.identifierM.Techen_US
dc.identifier.urihttp://hdl.handle.net/123456789/9672-
dc.guideKumar, Padam-
dc.description.abstractA security hole of current asynchronous transfer mode (ATM) deployment is that an end-to-end ATM connection generally bypasses Internet and Intranet firewalls, if there are any. Terminating ATM. connections at an intermediate packet-filtering firewall for inspection is not a solution, as the throughput of the traditional router-based firewalls is still much smaller, compared to the ATM rate of 622 Mbit/s or higher. The overhead caused by segmentation and reassembly (SAR) may further bring the performance down. The design of a value added ATMswitch that is capable of performing packet-level (IP) filtering is discussed in this dissertation .This firewall switch nicely integrates the IP level security mechanisms into the hardware components of an ATM switch so that most of the filtering operations are performed in parallel with the normal cell processing. The firewall switch employs the concept of "last cell hostage" (LCH) to avoid or reduce the latency caused by filtering.en_US
dc.language.isoenen_US
dc.subjectELECTRONICS AND COMPUTER ENGINEERINGen_US
dc.subjectATM FIREWALL SWITCH EMPLOYING LCH SCHEMEen_US
dc.subjectATMen_US
dc.subjectPACKET-LEVEL FILTERINGen_US
dc.titleSIMULATION STUDY OF ATM FIREWALL SWITCH EMPLOYING LCH SCHEMEen_US
dc.typeM.Tech Dessertationen_US
dc.accession.numberG10114en_US
Appears in Collections:MASTERS' DISSERTATIONS (E & C)

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