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DC Field | Value | Language |
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dc.contributor.author | Gupta, Ajay Kumar | - |
dc.date.accessioned | 2014-11-20T05:31:27Z | - |
dc.date.available | 2014-11-20T05:31:27Z | - |
dc.date.issued | 2000 | - |
dc.identifier | M.Tech | en_US |
dc.identifier.uri | http://hdl.handle.net/123456789/9672 | - |
dc.guide | Kumar, Padam | - |
dc.description.abstract | A security hole of current asynchronous transfer mode (ATM) deployment is that an end-to-end ATM connection generally bypasses Internet and Intranet firewalls, if there are any. Terminating ATM. connections at an intermediate packet-filtering firewall for inspection is not a solution, as the throughput of the traditional router-based firewalls is still much smaller, compared to the ATM rate of 622 Mbit/s or higher. The overhead caused by segmentation and reassembly (SAR) may further bring the performance down. The design of a value added ATMswitch that is capable of performing packet-level (IP) filtering is discussed in this dissertation .This firewall switch nicely integrates the IP level security mechanisms into the hardware components of an ATM switch so that most of the filtering operations are performed in parallel with the normal cell processing. The firewall switch employs the concept of "last cell hostage" (LCH) to avoid or reduce the latency caused by filtering. | en_US |
dc.language.iso | en | en_US |
dc.subject | ELECTRONICS AND COMPUTER ENGINEERING | en_US |
dc.subject | ATM FIREWALL SWITCH EMPLOYING LCH SCHEME | en_US |
dc.subject | ATM | en_US |
dc.subject | PACKET-LEVEL FILTERING | en_US |
dc.title | SIMULATION STUDY OF ATM FIREWALL SWITCH EMPLOYING LCH SCHEME | en_US |
dc.type | M.Tech Dessertation | en_US |
dc.accession.number | G10114 | en_US |
Appears in Collections: | MASTERS' THESES (E & C) |
Files in This Item:
File | Description | Size | Format | |
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ECDG10114.pdf | 1.69 MB | Adobe PDF | View/Open |
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