PERFORMANCE ANALYSIS OF BUFFERED ATM SWITCH WITH MULTIPLE INPUT QUEUES

Abstract

The rapid evolution in the field of information technology has led to the emergence of new switching technologies to support a variety of communication services with wide range of transmission rates a common, unified integrated services network. The progress in the field of ATM technology has brought 'up new design principles of high performance, high capacity of switching fabrics to be used in integrated networks of the future. The ATM switch for such high performance switching fabrics have been based on a principle known a fast packet switching. In this dissertation we present high performance switch fabric architecture, which incorporate fast cells switching. We describe an analysis of the performance of a packet switch based on buffered networks, the inter connection network of ATM switch maintains a separate input queues of cells for each output port. The switch uses PIM to find the maximal matching between the inputs and output ports of the switch.