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http://localhost:8081/xmlui/handle/123456789/9651
Title: | CHIP LEVEL DESIGN OF 4-BIT UNIVERS. SHIFT REGISTER |
Authors: | Venugopal, N. |
Keywords: | ELECTRONICS AND COMPUTER ENGINEERING;CHIP LEVEL DESIGN;DIGITAL SYSTEMS;FLIP-FLOP LEVEL |
Issue Date: | 2003 |
Abstract: | As Digital Systems have become more and more complex, detailed design of the system at the gate and flip-flop level has become very tedious and time consuming. For this reason, use of Hardware description languages in the Digital Design process continues to grow in importance. An HDL (Hardware Description Language) allows a Digital system to be designed and debugged at a higher level before conversion to Gate and Flip-Flop level. |
URI: | http://hdl.handle.net/123456789/9651 |
Other Identifiers: | M.Tech |
Research Supervisor/ Guide: | Sarkar, S. |
metadata.dc.type: | M.Tech Dessertation |
Appears in Collections: | MASTERS' THESES (E & C) |
Files in This Item:
File | Description | Size | Format | |
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ECDG11132.pdf | 5.03 MB | Adobe PDF | View/Open |
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