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DC Field | Value | Language |
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dc.contributor.author | Ghosh, Jyotirmoy | - |
dc.date.accessioned | 2014-11-19T13:35:19Z | - |
dc.date.available | 2014-11-19T13:35:19Z | - |
dc.date.issued | 1998 | - |
dc.identifier | M.Tech | en_US |
dc.identifier.uri | http://hdl.handle.net/123456789/9592 | - |
dc.guide | Sarkar, S. | - |
dc.description.abstract | One of the difficulties faced in '' realizing complementary MESFET's is the low barrier height of conventional p-MESFET's. The barrier height of a p-MESFET could be increased by implanting a shallow surface layer of a n-type impurity. Here, we study the effect of such an implant on the threshold voltage of a GaAs p-MESFET, ideality factor of its Schottky contact , its gate capacitance and its gate reverse current. The most important consideration i.e. the limit to which barrier height could be increased has been discussed. | en_US |
dc.language.iso | en | en_US |
dc.subject | ELECTRONICS AND COMPUTER ENGINEERING | en_US |
dc.subject | SCHOTTKY BARRIER HEIGHT TAILORING | en_US |
dc.subject | GAAS P-MESFET | en_US |
dc.subject | P-MESFET | en_US |
dc.title | AN ANALYTICAL STUDY OF SCHOTTKY BARRIER HEIGHT TAILORING | en_US |
dc.type | M.Tech Dessertation | en_US |
dc.accession.number | 248012 | en_US |
Appears in Collections: | MASTERS' THESES (E & C) |
Files in This Item:
File | Description | Size | Format | |
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ECD248012.pdf | 2.06 MB | Adobe PDF | View/Open |
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