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Title: | AN ANALYTICAL STUDY OF SCHOTTKY BARRIER HEIGHT TAILORING |
Authors: | Ghosh, Jyotirmoy |
Keywords: | ELECTRONICS AND COMPUTER ENGINEERING;SCHOTTKY BARRIER HEIGHT TAILORING;GAAS P-MESFET;P-MESFET |
Issue Date: | 1998 |
Abstract: | One of the difficulties faced in '' realizing complementary MESFET's is the low barrier height of conventional p-MESFET's. The barrier height of a p-MESFET could be increased by implanting a shallow surface layer of a n-type impurity. Here, we study the effect of such an implant on the threshold voltage of a GaAs p-MESFET, ideality factor of its Schottky contact , its gate capacitance and its gate reverse current. The most important consideration i.e. the limit to which barrier height could be increased has been discussed. |
URI: | http://hdl.handle.net/123456789/9592 |
Other Identifiers: | M.Tech |
Research Supervisor/ Guide: | Sarkar, S. |
metadata.dc.type: | M.Tech Dessertation |
Appears in Collections: | MASTERS' THESES (E & C) |
Files in This Item:
File | Description | Size | Format | |
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ECD248012.pdf | 2.06 MB | Adobe PDF | View/Open |
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