Please use this identifier to cite or link to this item: http://localhost:8081/xmlui/handle/123456789/9533
Title: PERFORMANCE EVALUATION OF FAST IP-ADDRESS LOOKUP SCHEMES
Authors: Appana, Sudhir Kumar
Keywords: ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING
Issue Date: 2000
Abstract: IP address lookup is becoming critical because of increasing routing table sizes, speed, and traffic in the Internet. Given a set S of prefixes and an IP address D, the IP address lookup problem is to find the longest matching prefix of D in set S. The interest is primarily motivated by building multi gigabit routers. Now this problem is addressed by using a LPC trie, a trie structure with combined path and level compression. This data structure enables us to build efficient and easily searchable implementation of an IP routing table. The memory usage is similar to that of a balanced binary search tree, but the expected average depth is smaller. The LPC-trie is well suited to modern language environments with efficient memory allocation and garbage collection. An implementation in the Java programming language is presented and shows that the structure compares favorably to a balanced binary search trees. Tables from the core routers namely, Mae-East, Funet-Table, Mae-West are used in the evaluation to ensure the .test with realistic data. This dissertation work is aimed to study various IP-Address Lookup Schemes and to evaluate the performance of these schemes.
URI: http://hdl.handle.net/123456789/9533
Other Identifiers: M.Tech
Research Supervisor/ Guide: Kumar, Padam
metadata.dc.type: M.Tech Dessertation
Appears in Collections:MASTERS' THESES (Electrical Engg)

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