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|Title:||A CAD TOOL FOR AUTOMATIC DESIGN OF FIXED TOPOLOGY CMOS OPAMPS|
|Authors:||Agarwal, Pushpendra Kumar|
|Keywords:||ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING|
|Abstract:||The CMOS op-amps with two fixed topologies are analyzed and the results are presented in the form of design equations alid procedures. Trade-offs among such factors as bandwidth, gain, phase margin, bias currents, signal swing, slew rate and power dissipation are made evident. Closed form expressions are developed and a sequence of design steps is established. Using these design equations a CAD tool for automatic design of fixed topology CMOS op-amps is generated. The results of PGPICE simulations are shown to agree very well with that of CAD tool,|
|Research Supervisor/ Guide:||Hasan, Mohd.|
|Appears in Collections:||MASTERS' DISSERTATIONS (E & C)|
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