PERFORMANCE ANALYSIS OF NONBLOCKING SPACE - DIVISION PACKET SWITCHES

Abstract

In the move towards the high performance packet switching for integrated service networks and multiprocessor interconnects, attention is focussing on packet switching architectures that provide many simultaneous input/output paths through the switch fabric and allow the internal paths to be time-multiplexed in a statistical rather than deterministic fashion. Such architectures provide the capability for high- speed transmission (1-200 Mbps) on each input/output link with a total switch capacity of 1-200 Gbps. In this dissertation two specific architectures of a nonblocking space- divison packet switch, namely input queueing and input-output queueing are considered. In the case of input queueing architecture with infinite buffer size and synchronous mode of operation, the effect of traffic nonuniformity on the performance parameters, e.g. maximum throughput, mean waiting time and queue length distribution is demonstrated with the help of few specific examples. In case of input-output queueing architecture, the impact of buffer size on the performance parameters, e.g. maximum throughput, total average system delay, backpressure probability is studied - for both the synchronous and asynchronous models with backpressure mechanism and speed-up equal to the output . buffer size. For numerical study, a general solution technique is presented, and MATLAB software is used for its implementation. It is observed that the result obtained and reported in this dissertation will find applications in the area of fast switching of packet networks particularly in Asynchronous Transfer Mode Networks (ATM.