Please use this identifier to cite or link to this item:
http://localhost:8081/xmlui/handle/123456789/9390
Title: | SIMULATION STUDIES OF RECONFIGURATION STRATEGY FOR K-FT MULTIPROCESSOR NETWORK |
Authors: | Roy, Bipin Kumar |
Keywords: | ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING |
Issue Date: | 1993 |
Abstract: | The rapid development of Very Large Scale Integrated (VLSI) technology and the need of very reliable multiprocessor network has opened up new frontiers of research in the field of fault-tolerant multiprocessor network. A multiprocessor network is represented by a graph whose nodes are the processors and the edges are interprocessor communication links. Simulation studies of reconfiguration strategy for k-Fault-tolterent multiprocessor nonhomogeneous symmetric d-ary tree (NST) network has been done in this dissertation. A supergraph S[k,T] of a tree T is a k-FT realization of T, if S[k,T] contains a subgraph Isomorphic to T, after removal of any k nodes. It was _.carried out- in two parts. Part-I- deals with the. design and reconfiguration strategy for k<d and the Part-II deals with the design and reconfiguration strategy fof kid. |
URI: | http://hdl.handle.net/123456789/9390 |
Other Identifiers: | M.Tech |
Research Supervisor/ Guide: | Kumar, Padam |
metadata.dc.type: | M.Tech Dessertation |
Appears in Collections: | MASTERS' THESES (E & C) |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
ECD245952.pdf | 2.32 MB | Adobe PDF | View/Open |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.