Please use this identifier to cite or link to this item: http://localhost:8081/xmlui/handle/123456789/9264
Title: PERFORMANCE ANALYSIS OF AN ATM SWITCH THROUGH SIMULATION
Authors: Prasad, P.
Keywords: ELECTRONICS AND COMPUTER ENGINEERING;ATM SWITCH;INTEGRATED SERVICES DIGITAL NETWORK;HEAD-OF-LINE
Issue Date: 1994
Abstract: Modern communication needs have given birth to an advanced digital system called Integrated Services Digital Network (ISDN). The ISDN has a primary aim of integrating the voice and nonvoice services. However ISDN can not support certain services like motion picture, interconnection of high bit rate LANs, HDTV because of the limited channel bandwidth. So, to support these advanced services B-ISDN was proposed as the future form of ISDN. ISDN uses Synchronous Transfer Mode for its switching and multiplexing. But CCITT has recommended Asynchronous Transfer Mode (ATM) as the technique for switching and multiplexing in B-ISDN. This thesis addresses itself to the study of a switch model for ATM networks through simulation. The switch Is assumed to be internally nonblocking and is provided with dedicated input and output buffers, one per switch inlet and one per switch outlet. In addition the switch is assumed to operate with an internal Speed Up, meaning that more than one packet per slot can be transferred from Head Of Line (HOL) positions of the input buffers to each output buffers by the interconnection network. Two different operation strategies are considered for the interaction between the input and output buffers: the Backpressure method and the queue loss method. The performance of the switch is evaluated In terms of throughput, average delay and cell loss probability.
URI: http://hdl.handle.net/123456789/9264
Other Identifiers: M.Tech
Research Supervisor/ Guide: Singh, Kuldip
metadata.dc.type: M.Tech Dessertation
Appears in Collections:MASTERS' DISSERTATIONS (E & C)

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