Please use this identifier to cite or link to this item: http://localhost:8081/xmlui/handle/123456789/9170
Title: IMPLEMENTATION OF CTDNET PRIMITIVE REDUCTION RULES
Authors: Ahmad, Aftab
Keywords: ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING;ELECTRONICS AND COMPUTER ENGINEERING
Issue Date: 1989
Abstract: The computing speed of single processor system has almost reached the breakpoint. It has now became obvious that the requirements for even more faster computation can only be satisfied by multiprocessor systems. The CTD multiprocessor architecture is one of such systems. This thesis describes the implementation of CTDNet primitive reduction rules. The CTDNet, which has been proposed by J.P.Gupta, employs eager evaluation scheme with a modification to evaluate condition expressions in a lazi manner. Application programs are described as a Lambda graph (consisting of Master processes) which carries the structure of the work to be performed. Whenever a master process is ready to reduce, it creates its slave which performs the executional work. The recursion,which has been recently proposed on CTDNet, have been succe- ssfully tested and its validity proved in this thesis. Finally, various suggestions for an efficient imple-mentation of CTDNet mechanism have been
URI: http://hdl.handle.net/123456789/9170
Other Identifiers: M.Tech
Research Supervisor/ Guide: Gupta, J. P.
metadata.dc.type: M.Tech Dessertation
Appears in Collections:MASTERS' THESES (E & C)

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