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dc.contributor.authorDave, Gunjan-
dc.date.accessioned2014-11-18T09:09:51Z-
dc.date.available2014-11-18T09:09:51Z-
dc.date.issued1987-
dc.identifierM.Techen_US
dc.identifier.urihttp://hdl.handle.net/123456789/9094-
dc.guideNanda, N. K.-
dc.description.abstractThe problem of test generation exceeds the capacity of existing computing. resources in time and ,cost as the logic circuits become more dense and more complex. One well accepted approach for reducing testing difficulties is to consider -circuit testability as early as possible in the design cycle. Several algorithms for measuring testability in digital circuits have been proposed. In each of these algorithms the testability of a digital circuit is directly related to the difficulty of controlling and observing the logical values of internal nodes from circuit inputs and outputs respectively. If the testability calculation is fast and if it accurately predicts the difficulty of test generation, than problem circuits can be identified early in,their design cycle and remedial actions can be taken as part of tip-, design. If the testability results are accurate for individual internal nodes, then areas of poor testability can be identified and this information can be used to direct circuit modifications which improve testability. In this work, a comparative study of the testability measures available in literature has been done. Two of the most widely used measures CAMELOT and SCOAP are then implemented to highlight the merits and demerits of each.en_US
dc.language.isoenen_US
dc.subjectELECTRONICS AND COMPUTER ENGINEERINGen_US
dc.subjectELECTRONICS AND COMPUTER ENGINEERINGen_US
dc.subjectELECTRONICS AND COMPUTER ENGINEERINGen_US
dc.subjectELECTRONICS AND COMPUTER ENGINEERINGen_US
dc.titleIMPLEMENTATION OF TESTABILITY MEASURESen_US
dc.typeM.Tech Dessertationen_US
dc.accession.number179127en_US
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