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Shodhbhagirathi @ IITR
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ELECTRONICS AND COMMUNICATION ENGINEERING (FORMERLY ELECTRONICS & COMPUTER ENGINEERING)
DOCTORAL THESES (E & C)
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Results 1-10 of 18 (Search time: 0.013 seconds).
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Issue Date
Title
Author(s)
Research Supervisor/ Guide
Type
2002
LAY-OUT DESIGN OF ENCODER AND DECODER CHIP FOR MOBILE APPLICATIONS
Kumar, Satyendra
Joshi, R. C.; Sarkar, S.
M.Tech Dessertation
2003
STUDY OF DYNAMIC CURRENT MODE LOGIC VLSI CIRCUITS"
Singh, Rajeer
Sarkar, S.
M.Tech Dessertation
2003
CHIP LEVEL DESIGN OF 4-BIT UNIVERS. SHIFT REGISTER
Venugopal, N.
Sarkar, S.
M.Tech Dessertation
2004
A STUDY OF VOLTAGE SCALING EFFECTS AND HIGH SPEED TECHNIQUES IN DYCML CIRCUITS
Thirupathi, Ch
Sarkar, S.
M.Tech Dessertation
2005
STUDY OF VOLTAGE-SCALED REPEATERS FOR LONG INTERCONNECTS IN V.L.S.I. CIRCUITS
Chandel, Rajeevan ( Nee Pathania)
Sarkar, S.; Agarwal, R. P.
Doctoral Thesis
2007
DELAY AND CROSSTALK ANALYSIS FOR A CMOS DRIVEN GLOBAL INDUCTIVE VLSI INTERCONNECTS
Kaushik, Brajesh Kumar
Joshi, R. C.; Agarwal, R. P.; Sarkar, S.
Doctoral Thesis
2006
INFRARED SIGNAL PROCESSING ALGORITHMS AND ARCHITECTURES FOR THERMAL IMAGING SYSTEMS
Kumar, Ajay
Sarkar, S.; Agarwal, R. P.
Doctoral Thesis
2007
ANALYTICAL STUDY OF CMOS-SUBTHRESHOLD OPERATION FOR LOW POWER VLSI APPLICATIONS
Jharia, Bhavana
Agarwal, R. P.; Sarkar, S.; Handa, S. C.
Doctoral Thesis
2003
MICROCONTROLLER DESIGN
Lohiya, Gaurav
Padma, D.; Sarkar, S.
M.Tech Dessertation
2005
AN ANALYTICAL STUDY OF DYNAMIC LOGIC CIRCUITS FOR VLSI. APPLICATIONS
Raju, Navan Ramesh
Sarkar, S.
M.Tech Dessertation
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Author
1
Bisht, Rajani
1
Chandel, Rajeevan ( Nee Pathania)
1
Dutta, Arindam
1
Jain, Sachin Kumar
1
Jharia, Bhavana
1
Kaushik, Brajesh Kumar
1
Kumar, Ajay
1
Kumar, Satyendra
1
Lohiya, Gaurav
1
Puli, Pratap
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2
VLSI CIRCUITS
1
4-BIT PROCESSOR UNIT
1
ARCHITECTURE DESIGN
1
BUFFER SYSTEM
1
CHIP LEVEL DESIGN
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CMOS BUFFERS
1
CMOS DRIVEN
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CMOS INVERTER
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CMOS TECHNOLOGY
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2003
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2000
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2006
Research Supervisor/ Guide
5
Agarwal, R. P.
2
Joshi, R. C.
1
Handa, S. C.
1
Padma, D.