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Shodhbhagirathi @ IITR
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ELECTRONICS AND COMMUNICATION ENGINEERING (FORMERLY ELECTRONICS & COMPUTER ENGINEERING)
DOCTORAL THESES (E & C)
MASTERS' THESES (E & C)
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Issue Date
Title
Author(s)
Research Supervisor/ Guide
Type
2009
ANALYTICAL MODELING OF DOUBLE GATE FinFET AND ITS APPLICATIONS TO SRAM CELL DESIGN
Raj, Balwinder
Dasgupta, S.
Doctoral Thesis
2009
A COMPARATIVE STUDY OF 61, 8T AND 9T DECANANO SRAM CELL
athe, Paridhi
Dasgupta, S.
M.Tech Dessertation
2009
MODELLING OF CROSSTALK NOISE IN LOCAL INTERCONNECTS
Choudhury, Tapas
Dasgupta, S.
M.Tech Dessertation
2009
DESIGN AND SIMULATION OF CMOS BASED 16-BIT MICROPIPELINED ASYNCHRONOUS ANALOG TO DIGITAL CONVERTER (AADC) FOR LOW POWER APPLICATIONS
Bh, Maruthi Chandrasekhar
Dasgupta, S.
M.Tech Dessertation
2009
SINGLE EVENT UPSET TOLERANT D-FLIP FLOP DESIGN IN 90nm PDSOI TECHNOLOGY
Puvvala, Eswara Kumar
Dasgupta, S.
M.Tech Dessertation
2009
DESIGN AND FPGA IMPLEMENTATION OF AREA OPTIMIZED 16-BIT DELTA-SIGMA DIGITAL TO ANALOG CONVERTER FOR PORTABLE AUDIO APPLICATIONS
Pottavathini, Shivakumar
Dasgupta, S.
M.Tech Dessertation
2009
NANOSCALE DG FINFETS: SCALING ISSUES, DEVICE OPTIMIZATION AND APPLICATION TO SRAMS
Dutta, Tapas
Dasgupta, S.
M.Tech Dessertation
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Author
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athe, Paridhi
1
Bh, Maruthi Chandrasekhar
1
Choudhury, Tapas
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Dutta, Tapas
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Pottavathini, Shivakumar
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Puvvala, Eswara Kumar
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Raj, Balwinder
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ELECTRONICS AND COMPUTER ENGINEERING
1
ANALOG CONVERTER
1
ANALOG TO DIGITAL C
1
CMOS BASED
1
CMOS TECHNOLOGY
1
DATA RETENTION
1
DECANANO SRAM CELL
1
DELTA-SIGMA DIGITAL
1
DESIGN AND SIMULATION
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DEVICE OPTIMIZATION
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