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|Title:||FPGA IMPLEMENTATION OF DIGITAL DISTANCE PROTECTION|
|Keywords:||ELECTRICAL ENGINEERING;FPGA IMPLEMENTATION;DIGITAL DISTANCE PROTECTION;POWER SYSTEM|
|Abstract:||The motivation for this thesis is our desire to build faster protecting devices to trip the unhealthy power system from healthy one. Generally, a protection system is a kind of "neural" complex that watches a "muscle" element of a power system and protects both this element from complete damage and the rest of a system from induced disturbances. Relays evolved from electromechanical to numerical relays. In this thesis, single-phase numerical distance relay has been implemented by using, Field Programmable Gate Arrays. Voltage and current signal were sampled and given to ADC for conversion. After getting the digital equivalents of voltage and current they were filtered by using Harr-Fourier algorithm in the FPGA chip. From the filtered voltage and current signals impedance was calculated and compared with pre-set value, then decision was taken to trip the system or not on the basis of actual impedance and pre-set impedance. In this thesis, I argue that we would greatly benefit from the usage of Field Programmable Gate Arrays (FPGA s) in the power system protection|
|Research Supervisor/ Guide:||Anand, R. S.|
Verma, H. K.
|Appears in Collections:||MASTERS' THESES (Electrical Engg)|
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