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DC Field | Value | Language |
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dc.contributor.author | Kumar, Arvind | - |
dc.date.accessioned | 2014-11-10T10:58:02Z | - |
dc.date.available | 2014-11-10T10:58:02Z | - |
dc.date.issued | 1996 | - |
dc.identifier | M.Tech | en_US |
dc.identifier.uri | http://hdl.handle.net/123456789/7634 | - |
dc.guide | Mishra, R. N. | - |
dc.description.abstract | In this report the microprocessor implementation of the phase lead and phase lag compensators is discussed. The main characteristics of this implementation are the general farm of the equations used, the high precision maintained, and the capability of handling a wide range of numbers by means of floating point representation in the microprocesor. An 8 bit general purpose microprocesor is employed, and software requird for the floating point arithmetic simulation and the compensator's realzation is presented. Analysis of second order systems with and without the compnsators is done using software simulations. Effect of the sampling period on a second order system is also analysed. Shortcomings of the microprocessor implement ion and the scope of the further work is discussed at the end. | en_US |
dc.language.iso | en | en_US |
dc.subject | ELECTRICAL ENGINEERING | en_US |
dc.subject | MICROPROCESSOR | en_US |
dc.subject | LEAD-LAG COMPENSATORS | en_US |
dc.subject | SECOND ORDER SYSTEM | en_US |
dc.title | MICROPROCESSOR BASED LEAD-LAG COMPENSATORS | en_US |
dc.type | M.Tech Dessertation | en_US |
dc.accession.number | 247620 | en_US |
Appears in Collections: | MASTERS' THESES (Electrical Engg) |
Files in This Item:
File | Description | Size | Format | |
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EED 247620.pdf | 1.92 MB | Adobe PDF | View/Open |
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