DEVELOPMENT OF DIGITAL NEGATIVE SEQUENCE RELAYING SCHEME

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DC Field	Value	Language
dc.contributor.author	Jahan, Kaushar	-
dc.date.accessioned	2014-10-11T11:02:36Z	-
dc.date.available	2014-10-11T11:02:36Z	-
dc.date.issued	1993	-
dc.identifier	M.Tech	en_US
dc.identifier.uri	http://hdl.handle.net/123456789/6076	-
dc.guide	Gupta, Bharat	-
dc.description.abstract	This report of dissertation entitled Development of Digital Negative sequence current relaying reviewed the different faults and advantages of computers in relaying. In developed scheme basically sampling technique is used. 13 samples are taken in one cycle at every 30°. These samples are holded at those particular instants. Three phase currents taken by the current sensors and these values goes to the external hardware circuit. Finally sampled signals are available for A/D conversion we have calculated the value of negative phase sequence current and time delay according to the equation described in scheme and try to follow the characteristics which is theoritically given by taking the value of k2 = 20. Circuit performance is given in chpater - 7.	en_US
dc.language.iso	en	en_US
dc.subject	ELECTRICAL ENGINEERING	en_US
dc.subject	DIGITAL NEGATIVE SEQUENCE RELAYING SCHEME	en_US
dc.subject	RELAYING SCHEME	en_US
dc.subject	A/D CONVERSION	en_US
dc.title	DEVELOPMENT OF DIGITAL NEGATIVE SEQUENCE RELAYING SCHEME	en_US
dc.type	M.Tech Dessertation	en_US
dc.accession.number	246377	en_US
Appears in Collections:	MASTERS' THESES (Electrical Engg)

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