SRAM DESIGN USING DIFFERENT TYPES OF FinFETs

Abstract

The main issue with SRAM cell is the conflict between read noise margins (RNM) and write noise margin (WNM). Any schematic- or technique that helps RNM hurts WNM, or vice-versa. In conventional FinFETs, optimal transistor sizing is employed to achieve best possible read-write stability. However, due.. to conflict between read-write noise margins offers a limited design space for FinFET-based SRAM cells. Hence, it is prudent to explore the asymmetric structures of FinFETs to relax conflict between RNM and WNM for designing the FinFET-based robust SRAM cells. This dissertation will discuss various advanced asymmetric structures of FinFETs and their application to mitigate the contradiction between read-write noise margins in SRAM cell. Using T-CAD simulations, the performance and yield of six-transistor 6T-SRAM cells are estimated for different schematic of symmetric and asymmetric structures of FinFETs. These schematics of SRAM cell uses asymmetric drain (AD); asymmetric drain spacer extension (ADSE) and asymmetric - lateral diffusion (ALD) based structure of FinFET devices. Application of novel asymmetric independent gate FinFET to SRAM is focused to use full advantage of asymmetric structure and independent gated schematic of SRAM cells. By exploiting asymmetry in bidirectional current, read—write noise margin (RNM-WNM) contradiction will be relaxed for proposed structure. The simulation result which considers both proposed asymmetric structure of FinFET and IGSRAM shows that the proposed FinFET SRAM achieves superior read-write noise margins without compromising each other.