DOCTORAL THESES (E & C) Collection home page

Browse
Subscribe to this collection to receive daily e-mail notification of new additions RSS Feed RSS Feed RSS Feed
Collection's Items (Sorted by Submit Date in Descending order): 21 to 40 of 208
Issue DateTitleAuthor(s)Research Supervisor/ Guide Type
Jul-2017ENERGY EFFICIENT COMPRESSIVE DATA GATHERING INWIRELESS SENSOR NETWORKSDolas, PrateekGhosh, DebashisThesis
May-2018On-Chip Timing Slack Monitors for Low Power ApplicationsGovinda, SannenaDas, Bishnu PrasadThesis
Jun-2018DEVELOPMENT OF DETECTION ENHANCEMENT ALGORITHM FOR GROUND PENETRATING RADARSharma, PrabhatSingh, DharmendraThesis
Mar-2018SPECTRUM EFFICIENT POWER ALLOCATION FOR OFDM COGNITIVE RADIOBharti, Manoranjan RaiGhosh, DebashisThesis
May-2018MODELING OF MISIM/MIS NANO-PHOTONIC SWITCHES AND SENSOR FOR IR-BANDSingh, MandeepDatta, ArnabThesis
Jan-2018HIDDEN OBJECT DETECTION WITH MICROWAVE AND MILLIMETER WAVE IMAGING SYSTEMKumar, BambamSingh, DharmendraThesis
May-2018PROCESS INDUCED MECHANICAL STRESS AWARE CMOS CIRCUIT DESIGNSharma, Arvind KumarBulusu, AnandThesis
May-2018INTERVAL TYPE-2 FUZZY LOGIC CONTROLLERS FOR ROBOT MANIPULATORSKumar, AnupamKumar, VijayThesis
Feb-2018RECONFIGURABLE MULTIBAND AND MULTIFUNCTIONAL RADIO-FREQUENCY INTEGRATED CIRCUITSKumar, AmarjitPathak, Nagendra PThesis
Mar-2018ANALYSIS AND MODELLING OF SPACER BASED GATE-ALL-AROUND RECONFIGURABLE DEVICEBhattacharjee, AbhishekDasgupta, SudebThesis
Dec-2017MODELING OF MULTIGATE MULTIFIN FINFET FOR HIGH FREQUENCY APPLICATIONSSharma, Savitesh MadhulikaKartikeyan, M.V.Thesis
Dec-2017VARIATION AWARE MEMORY DESIGN FOR LOW POWER APPLICATIONSRuchiDasgupta, SudebThesis
2017SAR DATA ANALYSIS FOR LAND COVER CLASSIFICATION AND SOIL MOISTURE RETRIEVALJain, AnkitaSingh, DharmendraThesis
Oct-2013INTERVAL TYPE-2 FUZZY LOGIC CONTROLLERS FOR POWER SYSTEM APPLICATIONSPanda, Manoj KumarPillai, G.N.; Kumar, VijayThesis
May-2014INVESTIGATIONS ON SPECIFIC MICROSTRIP FILTERS WITH DEFECTED GROUND STRUCTUREKumar, ArjunKartikeyan, M.V.Thesis
Sep-2015MODELING AND SIMULATION OF DOUBLE GATE TUNNEL FIELD EFFECT TRANSISTOR (DG-TFET)MenkaDasgupta, Sudeb; Bulusu, AnandThesis
Sep-2014TIMING MODELS FOR EFFICIENT CHARACTERIZATION OF NANOSCALE VLSI SINGLE STAGE STANDARD CELLSKaur, BaljitBulusu, Anand; Manhas, SanjeevThesis
Jan-2016A HEALING SYSTEM FOR FAILED ANTENNA ARRAY USING EVOLUTIONARY COMPUTATIONAL TECHNIQUESAcharya, Om PrakashPatnaik, A; Sinha, S. N.Thesis
Nov-2015DUAL-k SPACER ENGINEERED DEVICES FOR HIGH PERFORMANCE DIGITAL CIRCUIT/SRAM APPLICATIONSPal, Pankaj KumarKaushik, B. K.; Dasgupta, SThesis
Nov-2015MODELING OF CROSSTALK EFFECTS IN CMOS GATE DRIVEN ON-CHIP INTERCONNECTS USING FDTD TECHNIQUEVobulapuram, Ramesh KumarKaushik, B. K.; Patnaik, AThesis
Collection's Items (Sorted by Submit Date in Descending order): 21 to 40 of 208