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Issue DateTitleAuthor(s)Research Supervisor/ Guide Type
Sep-2015MODELING AND SIMULATION OF DOUBLE GATE TUNNEL FIELD EFFECT TRANSISTOR (DG-TFET)MenkaDasgupta, Sudeb; Bulusu, AnandThesis
Sep-2014TIMING MODELS FOR EFFICIENT CHARACTERIZATION OF NANOSCALE VLSI SINGLE STAGE STANDARD CELLSKaur, BaljitBulusu, Anand; Manhas, SanjeevThesis