Design of CMOS Based Logarithmic Circuit in Radiation Detector Application

Abstract

The technique of radiation detection is crucial in many industries, including nuclear power plants, space exploration, and medical imaging. The central concept of this Master's thesis is to design and simulate the logarithmic circuit using 180 nm technology using cadence virtuoso tool with the help of CMOS (Complementary Metal Oxide Semiconductor). This circuit consists of a current mirror and transconductance amplifier. This current mirror circuit provides linearity of the circuit, whereas the transconductance amplifier circuit maintains the logarithmic response of the input signal. This logarithmic circuit reduces the wide range of input signals to a more manageable range of the output signal to excellent linearity and accuracy over a wide range of input signals frequencies and amplitude. Due to non-ideal parameters of CMOS like threshold voltage(Vth), oxide capacitance(Cox), crosstalk, and power supply, noise timing jitter is produced, which we can reduce by this logarithmic amplifier circuit. There are various benefits to the suggested CMOS-based logarithmic circuit design. First, the circuit is inexpensive and straightforward to integrate with other CMOS-based circuits, thanks to CMOS technology. Second, the circuit has a low power need, making it appropriate for battery-powered applications. Finally, the small circuit makes it appropriate for applications with limited space. The proposed circuit design will likely be helpful in various radiation detecting detecting applications. For instance, in medical imaging, the logarithmic amplifier circuit can detect radiation despite the walk and jitter issue. The circuit can be applied to radiation detectors in space exploration to gauge astronaut radiation exposure during space missions. The circuit can be utilized in radiation monitors at nuclear power plants to find environmental radiation levels. In this thesis, we use Constant Fraction Discriminator (CFD) principle that helps to reduce timing jitter and walk by converting the input signal into a time-dependent signal with an improved signal-to-noise ratio. This signal will be converted into a bipolar signal based on the Constant Fraction Triggering (CFT) technique. In this, we use zero crossing phenomenon in which the threshold is adjusted just above the noise level so that signal will be noise free. The CFD is an efficient signal processing technique that, in comparison to other time-to-amplitude conversion methods, has a number of advantages. The suggested CFD circuit design responds to the input signal with accuracy and precision, making it appropriate for use in a variety of radiation detection applications. The circuit is inexpensive and simple to integrate with other CMOS-based circuits. The proposed CFD circuit design has the ability to aid in the creation of fresh and cutting-edge radiation detection systems across a range of industries.