1. Shodhbhagirathi @ IITR
  2. ELECTRONICS AND COMMUNICATION ENGINEERING (FORMERLY ELECTRONICS & COMPUTER ENGINEERING)
  3. MASTERS' THESES (E & C)
Please use this identifier to cite or link to this item: http://localhost:8081/xmlui/handle/123456789/2121
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dc.contributor.authorChandra, Suresh-
dc.date.accessioned2014-09-26T12:23:21Z-
dc.date.available2014-09-26T12:23:21Z-
dc.date.issued1977-
dc.identifierM.Techen_US
dc.identifier.urihttp://hdl.handle.net/123456789/2121-
dc.language.isoenen_US
dc.subjectELECTRONICS AND COMPUTER ENGINEERINGen_US
dc.subjectASYNCHRONOUS-CIRCUIT DESIGNen_US
dc.subjectSEQUENTIAL CIRCUITen_US
dc.subjectCIRCUIT DESIGNen_US
dc.titleMATRIX METHOD FOR SYSTEMATISING ASYNCHRONOUS -SEQUENTIAL CIRCUIT DESIGNen_US
dc.typeM.Tech Dessertationen_US
dc.accession.number109799en_US
Appears in Collections:MASTERS' THESES (E & C)

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