Study of MOSFET Development from Planar to Vertical Gate-All-Around Nanowire MOSFETs and Measurement of its I-V Characteristics

Abstract

Si based CMOS technology has been serving as the main engine in the microelectronics technology over the past 50 years and it has served as a revolution in the device technology. To enhance the performance of Si based complementary metal-oxide semiconductor (CMOS) technology, the miniaturization in the transistor dimension is the main key. This reduction in device dimension to improve the performance generation b generation is dented as Moore La However, this advancement of traditional planar device has come to edge of its end in terms of packing density, electrostatic controllability. and power dissipation. This leads the technology to approach new channel materials and device architectures to further extend CMOS technology with Moore La Gro p IV materials s ch as Ge and GeSn semiconductors are emerging as promising candidates as they exhibit high carrier mobilities, small and tunable bandgaps. They can be easily integrated on Si wafers. Also, the evolution in the transistor architecture from conventional planar structure to 3D FinFET, and eventually to gate-all-around (GAA) nanowire device offers superior control over gate electrostatics and good immunity against short-channel effects. Furthermore, the vertical GAA nanowire transistors provide further scalability, more layout efficiency and less power consumption when compared to conventional horizontal nanowire transistors and multi-gate transistors such as FinFETs. Therefore, the vertical gate-all-around nanowire transistors are considered as the ultimate candidate for the classical CMOS scaling. This thesis work involves the study of study of basic MOSFET and its development from conventional planar to ultimate the vertical gate all around nanowire transistors. The vertical gate all around nMOSFETs based on Ge and GeSn are characterised and measured at different temperature. Some important parameters such as threshold voltage (VTH), subthreshold swing (SS) and the ratio of On-current to Off-current (Ion/Ioff) are extracted. The result shows that the nMOSFET based on GeSn as a channel material exhibits better performance then Ge nMOSFETs.