Study and Design of Integrated Phase Shifter using 130 nm technology

Abstract

Phase shifters play a very important role in the modern RF systems. It has many applications like in the phase locked loops, image rejection receivers and many others. Phase shifter can be designed using passive topology like the LC based circuit topology or using active topology like the all pass filter circuit topology. As compared to passive circuit designs, active topology based phase shifters provide better accuracy and proper gain. The phase shifter in this thesis is designed using 130nm CMOS technology. Using CMOS technology provides better performance and also can be carried out at low expenses. The phase shifter is designed for Ku band. The input ac signal is given to a balun which at its output gives differential signal. This is then given as input to the analog differential adder after passing through a DC block circuit. The analog differential adder is designed using two Gilbert cells and the concept of variable gain amplifiers (VGAs) is used. Two DACs are designed to provide the biasing of the tail MOS of the Gilbert cells. Each of this DAC acts as a current supplier. It is a 4-bit DAC and the current in each branch is binary weighed. The summation of the entire current is then mirrored to the tail MOS of the Gilbert Cell. The working and simulation results of each block is further explained elaborately in Chapter 2.