Comb filter for ∑Δ ADC and polyphase implementation of CIC filter

Abstract

The Analog to Digital Converters (ADCs) in cascade with Cascaded Integrator Comb (CIC) filter has a various number of applications in many areas of electronics like frequency selector function in a digital circuit. These filters are usually placed just after the Sigma Delta modulators. The CIC filter is a multiplierless structure i.e. does not require multiplier and any storage devices for its coefficients unlike in the case of standard FIR and IIR filter since the filter coefficient in case of CIC are unity. Therefore, it could be effectively used for its operation at very high speed/rate. The CIC filter makes use of the pipelined structure which consists of fast adders (FAs). These filters are designed and implemented by using FPGA and Xilinx synthesis. The Sigma Delta is one of leading Analog to Digital (ADC) converter for low frequency, high resolution applications. It works on the concept of oversampling and noise shaping. According to the theory, the Sigma Delta ADC can be designed for any resolution. But practically resolution is limited by many different factors. The most important factor in limiting the resolution is transfer function of system. The relative location of poles and zero affects the system performance and stability. There are various types of modelling for the CIC Decimation filter. Also, many different techniques for pass band improvement, stop band improvement are also used. A CIC filter specification is obtained along with its CIC compensator using this modelling scheme.