Analysis of multibit spin devices, memory and neural network

Abstract

In recent decades, the semiconductor industry has undergone remarkable growth, catalyzing a transformative impact on daily life through the evolution of electronic devices such as mobile phones and computers. This surge in technological advancements has concurrently intensified the demand for higher storage density. The emergence of spintronics has boosted storage capabilities by utilizing the effect of Tunnel Magnetoresistance. Magnetic Tunnel Junctions (MTJs), fundamental storage element in spintronics devices, have garnered interest due to their endurance, non-volatility, scalability, and compatibility with CMOS technologies. Different methods have been employed to write information into MTJs such as field-induced magnetic switching, spin transfer torque (STT), spin orbit torque (SOT), and voltage controlled magnetic anisotropy (VCMA). Single MTJ stores one bit per cell, hence, significant efforts have been made by the researchers to achieve multiple bits per cells by stacking multiple MTJs utilizing hybrid switching techniques such as STT, SOT and VCMA and a storage capacity up to 3 bits per cell has been achieved till now. Stacking of multiple MTJs is challenging because it requires additional writing steps that leads to additional footprint area, power, and latency overhead. Therefore, there is need to explore more novel structures or devices to achieve high storage density that overcomes these overheads. Magnetic Domain Wall (DW) devices have emerged as promising alternatives, offering high storage density, low driving current requirements, and improved cascading compared to existing technologies. DW memory has evolved from field-induced to current driven motion, resulting in advancements such as decreased bit size, improved thermal stability, and enhanced DW speed. However, scalability of DW devices is constrained by pinning defects along the nanowire. Therefore, it is a difficult task to develop an artificial pinning potential for storing magnetic bits at specific positions precisely. Various geometrical and non-geometrical techniques have been demonstrated to control and achieve the pinning of DWs. With increasing efforts, there is a growing need to explore innovative approaches to create, propagate, and detect the magnetic DWs in order to propel advancements in research and development. Despite their potential, applying DW devices at the circuit and system level remains challenging due to the gap between device physics and hardware circuit design. Existing dynamic-based compact models do not include all the factors responsible for the motion of the DW, hence, there is a need for a more accurate and robust model that considers all factors influencing DW motion.