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http://localhost:8081/jspui/handle/123456789/20009| Title: | FAST UNCERTAINTY QUANTIFICATION OF ON-CHIP GRAPHENE-BASED NANOINTERCONNECTS AND NANOSCALE FIELD-EFFECT TRANSISTORS (FETS) |
| Authors: | Gaglani, Surila |
| Issue Date: | Apr-2024 |
| Publisher: | IIT Roorkee |
| Abstract: | With the sustained miniaturization of integrated circuits (ICs), the conventional devices such as planar metal-oxide-semiconductor field-effect transistors (MOSFETs) and copper interconnects are facing serious challenges such as electromigration, short channel effects (SCEs), quantum confinement, heat dissipation, propagation delay, and signal attenuation affecting the overall system reliability. This has motivated the researchers to explore new materials and device structures which can undergo further scaling to achieve better performance. Graphene-based interconnects such as carbon nanotube (CNT) and graphene nanoribbon (GNR) interconnects offer longer MFPs, lower resistivity, and higher mechanical strength. All these properties of graphene-based interconnects make them an attractive choice for new generation on-chip interconnects. Similarly, multi-gate FETs such as FinFETs where the channel is wrapped with multiple gates have emerged as alternative devices to planar MOSFETs. FinFETs are more scalable than planar MOSFETs and provide superior gate control and significant immunity from SCEs because of their quasi-planar structures. Apart from the remarkable properties of emerging nanoscale devices, they are highly susceptible to fabrication process variations which means even a small variation in the design parameters can cause unpredictable device behaviour reducing system reliability. Hence, it becomes necessary to quantify this uncertainty in the system performance at the earliest design stage. Typically, Monte Carlo (MC) is employed for this purpose. However, MC requires thousands of repeated simulations of the system over the entire design space to make accurate inferences about the system outputs. This time cost is further aggravated by the large simulation time cost of a single physics-based simulation of graphene interconnects and 3-dimensional (3D) FinFETs. Compact models have been developed to tackle this challenge. However, the simplicity and numerical efficiency of these compact representations come at the expense of rigor and accuracy, thus performing uncertainty quantification (UQ) with these models is not a suitable solution. |
| URI: | http://localhost:8081/jspui/handle/123456789/20009 |
| Research Supervisor/ Guide: | Roy, Sourajeet |
| metadata.dc.type: | Thesis |
| Appears in Collections: | DOCTORAL THESES (E & C) |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| 19915027_SURILA GUGLANI.pdf | 3.92 MB | Adobe PDF | View/Open |
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