Please use this identifier to cite or link to this item: http://localhost:8081/jspui/handle/123456789/19984
Title: FPGA BASED P CLASS SYNCHROPHASOR ESTIMATION
Authors: Kumar, Vikas
Issue Date: May-2022
Publisher: IIT, Roorkee
Abstract: As the population is increasing rapidly, Energy demands also need to be fulfilled efficiently, for that supervision and monitoring of power system in various dynamic events have to be done precisely, such tasks are normally done by Supervisory Control and Data Acquisition System (SCADA) and Phasor Measurement Unit (PMU) also. PMU is best among all in terms of accuracy and time delaying as it uses Global Positioning System for synchronization with other PMUs, and a strong phasor estimation algorithm with a smaller number of samples giving accurate and real-time me tracking of power system in normal events as well as dynamic events. We develop FPGA implementation of phasor estimation using Least square method and evaluate its performance as per IEEE standard of synchrophasor measurement.
URI: http://localhost:8081/jspui/handle/123456789/19984
Research Supervisor/ Guide: Kumar, Vishal
metadata.dc.type: Dissertations
Appears in Collections:MASTERS' THESES (Electrical Engg)

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