HIGH PERFORMANCE RING OSCILLATORS USING SEPARATELY DRIVEN INPUTS

Abstract

The phenomenal growth in high data rate in low power communication systems requires clocking solutions to provide a wide frequency tuning range, multiple output phases, and low supply sensitivity. Ring oscillators (ROs) have enjoyed popularity in wire-line applications due to their insignificant magnetic coupling from other circuits, compact layouts, ease of design, and scalability towards smaller nodes. However, their utilization in wireless systems has been hampered by their inferior phase noise and spectral purity compared to the LC oscillator. The ROs are straightforward in generating multiple phases, and it is possible to reconfigure the number of their delay cells to cover various frequency bands. Single-ended ROs use an odd number of delay cells in the loop, leading to phase granularity, and the oscillation frequency is inversely proportional to the stages. Therefore, the generation of high-resolution multi-phase clocks that operate at high oscillation frequency remains a challenge. This thesis first describes a general approach to realize ring oscillators for generating high-frequency multi-phase (even/odd) signals with low phase noise, low power, and reduced supply sensitivity (ROs). A multi-loop skew-based single-ended ring oscillator (MSSROs) is proposed, and systematic analysis is performed on identical MSSROs to determine the relationship between their oscillation frequency and skew offset. This analysis is based on the signal propagation mechanism in a skew-based Ring Oscillator. The skew-based architecture is based on a one-of-a-kind feedback/feed-forward technique for implementing a fast loop in a long chain RO with separately driven PMOS/NMOS transistors. As the number of stages increases, this unique connection in MSSROs generates a (negative/positive/zero) skew offset NSO/PSO/ZSO between the PMOS/NMOS inputs. As a result, MSSROs have a time period comparable to 3-stage single-ended conventional ROs and have lower phase noise even with a more significant number of stages (even/odd). A technique is also established for designing an oscillator to get the desired Phase Noise. The next section of the thesis discusses a generic method for obtaining the maximum feasible RO oscillation frequency while minimizing phase noise in an improved circuit design using novel delay cells. The delay cells' inputs are separated by an optimized skew offset in the circuit architecture. Skew offset is further optimized by incorporating a pre-charge/discharge auxiliary feed-forward loop into the separately driven delay cells. This method reduces the transition time when Supply and GND are connected/disconnected to the delay cell's output node simultaneously. These delay cells offer excellent performance, even/odd multi-phase signals when connected in loops to form a Ring Oscillator. The thesis further presents a sizing technique for the skew-based oscillator based on the switching trajectory of its skew-based (positive/negative) delay cell, followed by the ring oscillators. In contrast to a traditional inverter, where the switching current is simply a function of NMOS (PMOS) current for a falling (rising) transition, switching current for a skew-based delay cell is a function of both NMOS and PMOS currents in the NSO/PSO during the input falling (rising) transition. This model is validated with circuit simulations. These models are applicable to any PDK/technology node to design any stage oscillator, resulting in a size range (WP/WN) in which these oscillators reach a steady state. In the last section of the thesis, we investigate the effect of skew offset on phase noise, and the noise shaping function is derived in terms of skew offset, and its impact on the shaping of the intrinsic individual noise contribution is examined (thermal, flicker, and shot noise). The overall phase noise is then anticipated and matched with the simulated one utilizing the noise translation behavior of the skew-based oscillator. The thesis, therefore, proposes a robust design methodology addressing performance and phase noise targets.