DESIGN OF ACTIVE POWER FILTER FOR VOLTAGE HARMONIC REDUCTION

Abstract

In a system characterized by various sources and numerous loads, the setup of the shunt active power filter (SAPF) for harmonic reduction and power quality improvement at every load is costly, not guaranteed as user may not install one, and not feasible at all cases. In an effort to address the issue, This project proposes a novel control technique for Active Power Filter (APF) system that relies on the detection of PCC (Point of Common Coupling) voltage without the inclusion of current sensing in the control loop. Thus making the device sensor less, or act as plug and play as it is able to mitigate the harmonics generated by the distorting loads solely by measuring the voltage at the point of common coupling (PCC), without the need of measuring the current of the distorting loads. It gives the advantage to install the equipment at PCC/feeder where the load current’s exact direction and number of loads can be left undetermined. The active filter functions similar to low-resistance path for the external circuitry to attenuate harmonic frequencies, thus acting as damping . Existing techniques such as selective harmonic elimination , use of multiple channels for individual harmonic elimination, are presented in literature that use voltage detection to compensate harmonics. But the proposed method uses single channel thus reducing component count as well as, can damp all the harmonics that exist rather than just a single harmonic. Simulation is carried out to examine the effectiveness and suitability of voltage detection based compensator in harmonic damping and results that show improvements are presented.