Please use this identifier to cite or link to this item: http://localhost:8081/jspui/handle/123456789/18450
Title: FPGA-BASED CORDIC ALGORITHM AND MEMRISTIVE CHAOTIC SYSTEM FOR ENHANCED HIGH-PERFORMANCE COMPUTING
Authors: Kumar, Ajay
Issue Date: Jun-2024
Publisher: IIT, Roorkee
Abstract: This thesis explores the development and integration of a Field-Programmable Gate Array (FPGA)-based Coordinate Rotation Digital Computer (CORDIC) algorithm with a memristive chaotic system to enhance high-performance computing (HPC) capabilities. The CORDIC algorithm, renowned for its efficiency in performing trigonometric, hyperbolic, and other transcendental functions, is implemented on FPGA to leverage its parallel processing potential. Concurrently, the memristive chaotic system, known for its rich dynamical properties and potential for secure communication and computation, is integrated to introduce a novel computational paradigm. The research demonstrates the FPGA-based implementation of the CORDIC algorithm, achieving significant improvements in computational speed and resource efficiency compared to traditional methods. The memristive chaotic system's integration further enhances the system's performance by providing an additional layer of computational complexity and security. The combination of FPGA and memristive technology presents a robust solution for applications requiring high-speed computations and secure data processing, such as cryptographic systems, signal processing, and real-time data analysis. This thesis contributes to the field of HPC by introducing a hybrid computational architecture that harnesses the strengths of FPGA-based CORDIC and memristive chaotic systems. Future work will explore the scalability of the proposed system and its applicability to other domains requiring enhanced computational performance and security. By implementing efficient algorithms like the CORDIC algorithm and integrating memristive chaotic systems on FPGAs, we can enhance the computational performance and address the limitations of traditional methods. This thesis aims to explore these innovative approaches and demonstrate their effectiveness in achieving high-performance computing.
URI: http://localhost:8081/jspui/handle/123456789/18450
Research Supervisor/ Guide: Sharma, Ambalika
metadata.dc.type: Dissertations
Appears in Collections:MASTERS' THESES (Electrical Engg)

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