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dc.contributor.authorPatel, Meghna Maheshkumar-
dc.date.accessioned2025-10-03T10:31:40Z-
dc.date.available2025-10-03T10:31:40Z-
dc.date.issued2024-05-
dc.identifier.urihttp://localhost:8081/jspui/handle/123456789/18374-
dc.guideDas, Bishnu Prasaden_US
dc.description.abstractThe Study involves implementation of PRESENT Cipher in Verilog and synthesized on Xilinx XC7K70TFBV676-1 FPGA. PRESENT Cipher is part of Light weight Cryptography Algorithm mainly used in resource constrined devices. This is Block Cipher which uses Symmetric Key and it is SPN( Substitution Permutation Network) based algorithm. Conventional Cryptography is used in server , desktop type application, where as light weight Cryptography is useful embedded system, RFID, IoT , Sensor based systems.That explains : LWC is a subfield of cryptography that aims to provide solutions tailored for resource-constrained device. Here, Iterative architecture of PRESENT cipher has been implemented. Both encryption and Decryption part have been mplemeted and synthesied on FPGA.Modification in the architecture has been done with respect to no. of data bus bits of user , requirement of rounds ( 1 to 31) bsed on security requirement. Actual algorithm is done with Static substitution Box. New Dynamic S-Box has been implemented using Galois Field theory. Dynamic S-Box generation and Chaining of these 16 Dynamic boxes in the substitution layer has improved more nonlinearity and security of the system. Implemented New S-Box test criteria has been evaluated. Performance metrices for all the system has been compared with respect to latency, resource utilization , timing summary, Power utilization and Maximum operating frequency and Throughput of the system.en_US
dc.language.isoenen_US
dc.publisherIIT, Roorkeeen_US
dc.titleLIGHTWEIGHT CRYPTOGRAPHY: PRESENT CIPHER IMPLEMENTATION WITH DYNAMIC S-BOXen_US
dc.typeDissertationsen_US
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