Please use this identifier to cite or link to this item: http://localhost:8081/jspui/handle/123456789/18281
Title: INVESTIGATION ON THREE PHASE CHB BASED SAPF AND UPQC
Authors: V., Muneer
Issue Date: Jan-2023
Publisher: IIT, Roorkee
Abstract: The power quality degradation problems in distribution systems are increased due to the use of nonlinear load, adjustable speed drives, imbalanced load, microgrid integration, etc. The power quality problems in the distribution system are commonly mitigated by using active power filters instead of passive filters. The custom devices used to mitigate power quality problems are shunt active power filter (SAPF), series active power filter and unified power quality conditioner (UPQC). The thesis is focussing on the performance improvements of SAPF and UPQC. The work presented in the thesis starts with a detailed literature review of SAPF and UPQC in terms of topology and architecture. The three-phase three-level CHB based SAPF is integrated with the batteries through a DC-DC converter. Thus, it provides peak power demand management and mitigates multiple power quality problems. The proposed topologies are controlled by a sliding mode controller (SMC) for robustness and better dynamic response. The proposed three-level SAPF for the three- wire system is developed by using three H bridges. The same topology also extended to the four wire system without using any additional switches. The reduction of switch count in the three level CHB SAPF is achieved by integrating passive filters with it. This recommended SAPF (ES SAPF) is developed by using two Hbridge and two DC-link capacitors. Compared to the conventional three-level H Bridge-based SAPF, the proposed topology saves four semiconductor switches and one DC-link capacitor. The ES- CHB-based SAPF also reduces voltage stress across each switch. The only drawback of the suggested SAPF is the DC link voltage unbalances. A modified feedback control strategy is proposed in this study to address this problem. Machine Learning (ML) is one of the fast controllers, and it is used for the controller of SAPF. ML design had always been sub-optimal as human experts designed them. This drawback is also addressed by optimizing all the design processes, including data preprocessing, model selection, and model hyperparameters. Automated Machine Learning (AutoML) algorithms are used to find the optimum pipeline for ML models from a search space. Open source algorithm packages, AutoSklearn and AutoKeras, are used for this. This novel MLbased controller produces better current reference generation and faster estimation results than the conventional control scheme. i A modified three-wire three-level CHB based UPQC without any transformer in the shunt part is proposed to mitigate the multiple power quality problems in the three wire system. The proposed topology is controlled by using second-order sliding mode control (SOSMC). Thus, this topology has less component count than the flying capacitor and NPC-based UPQC. The isolated operation of the series part of the UPQC leads to distortion in the mitigated load voltage. A second-order sliding mode control is proposed to defeat this problem. The second- order sliding mode control eliminates the differentiation requirement compared to the single- order sliding mode control. Thus this technique provides better robustness and dynamic response during source and load perturbation. In addition to the SOSMC controller, the compensation voltage and current reference extraction are achieved by using an artificial neural network (ANN). The proposed three level CHB based UPQC is extended to a four-wire system without any additional switch and integrated with batteries through a bidirectional DC to DC converter. Thereby the proposed topology provides the power quality problems mitigation and peak power demand managements simultaneously. The proposed four wire topology also controlled by using SOSMC. A novel twenty switch three-level cascaded H bridge (CHB) based UPQC for the mitigation of multiple power quality problems is proposed in Chapter 7. The proposed topology is developed using five H bridge and two DC link capacitance, saving four semiconductor switches and one DC link capacitance compared to the conventional three-level CHB based UPQC. The shunt part of UPQC is controlled by using a modified control strategy. Hence it mitigates the voltage unbalances present in the DC link capacitors. The proposed topologies and control method are simulated by using MATLAB/simulink and verified through hardware developed in the laboratory.
URI: http://localhost:8081/jspui/handle/123456789/18281
Research Supervisor/ Guide: Bhattacharya, Avik
metadata.dc.type: Thesis
Appears in Collections:DOCTORAL THESES (Electrical Engg)

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