PERFORMANCE INVESTIGATION OF FLYING CAPACITOR MULTILEVEL INVERTER

Abstract

In recent years, industry has begun to demand higher power equipment, which now reaches the megawatt level. Controlled ac drives in the megawatt range are usually connected to the medium-voltage network. Today, it is hard to connect a single power semiconductor switch directly to medium voltage grids (2.3, 3.3, 4.16, or 6.9 kV). For these reasons, multilevel converters have emerged as the solution for working with higher voltage levels. The general structure of the multilevel inverter is such as to synthesize a sinusoidal voltage from several levels of DC voltage. Increasing the number of levels produces a fine staircase waveform approaching close to a sinusoidal wave with minimum harmonic distortion. In this thesis simulation of various topologies based on development of a three level flying-capacitor multilevel inverter was carried out and the performance of all these inverters was evaluated. The line current THD variation of the inverters for the R, R-L and Induction motor load and a fine comparison of the performance of all the inverters was also made. The flying capacitor voltage ripple was observed for different topology and finally a comparative analysis was done among them. The hardware implementation of three level flying capacitor multilevel inverter using the topology employing PD SPWM is analysed along with its limitations. Both open loop and closed ioop control strategy along with the detailed working principles to balance the flying capacitor voltage is also presented in detail. The limitations of the microcontroller used for the hardware implementation is also discussed.