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Title: | DESIGN AND IMPLEMENTATION OF FREQUENCY LOCKED LOOP IN GLOBAL NAVIGATION SATELLITE SYSTEM RECEIVERS |
Authors: | Joshi, Udaya |
Keywords: | Closed Loop;Magnitude Phase Spectra;Simulation;Quadrature |
Issue Date: | Jun-2014 |
Publisher: | I I T ROORKEE |
Abstract: | A sliding DFT based frequency locked loop is proposed for global navigation satellite system receiver. Closed loop SDFT filter behavior is utilized to design the frequency locked loop. Magnitude phase spectra of SDFT filter operating in a feedback loop provide almost flat response around the center frequency. The small magnitude and phase error observed at the in-phase and quadrature component caused by frequency variation from center frequency can be adjusted by adaptive sampling frequency control. The incoming frequency of the receiver signal is estimated by correlating the quadrature component of SDFT and error obtained from the feedback loop. The sampling frequency - of SDFT is adjusted by numerically controlled oscillator with the help of estimated frequency. Hence large variation in input frequency could be estimated for bi-phase • signal of GNSS receiver. Simulation studies demonstrates the suitability of the FLL for GNSS receiver. Simulation results had been validated through the experimental investigation by implementing SDFT FLL using an FPGA. |
URI: | http://localhost:8081/jspui/handle/123456789/17223 |
metadata.dc.type: | Other |
Appears in Collections: | MASTERS' THESES (Electrical Engg) |
Files in This Item:
File | Description | Size | Format | |
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G23514.pdf | 16.21 MB | Adobe PDF | View/Open |
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