Please use this identifier to cite or link to this item: http://localhost:8081/jspui/handle/123456789/16914
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dc.contributor.authorDutta, Ayan-
dc.date.accessioned2025-06-20T13:39:08Z-
dc.date.available2025-06-20T13:39:08Z-
dc.date.issued2015-05-
dc.identifier.urihttp://localhost:8081/jspui/handle/123456789/16914-
dc.description.abstractDownscaling of conventional MOSFETs in standard CMOS technology is becoming much tougher each day , since in nanoscale devices, quantum mechanics comes into effect & off-state leakage * increases drastically. In order to counter these obstacles , various transistor architectures like FinFET Silicon Nanowire FET etc have been invented. In this article , a novel idea for analytical modelling of Tn-Gate Silicon Nanowire FET structure has been proposed. This device is conceptualized to show ambipolarity & Dual-Threshold Voltage features , i.e. this uncommitted device can be operated as a pFET or nFET with high or low threshold voltage at the runtime , by electrically tuning its polarity gatesen_US
dc.description.sponsorshipINDIAN INSTITUTE OF TECHNOLOGY ROORKEEen_US
dc.language.isoenen_US
dc.publisherIIT ROORKEEen_US
dc.subjectMOSFETs In Standarden_US
dc.subjectCMOS Technologyen_US
dc.subjectQuantum Mechanicsen_US
dc.subjectTransistor Architecturesen_US
dc.titleANALYTICAL MODELLING AND SIMULATION OF MULTI- GATE SILICON NANOWIRE FET FEATURING AMBIPOLARITY AND DUAL-THRESHOLD VOLTAGE CHARACTERISTICSen_US
dc.typeOtheren_US
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