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DC Field | Value | Language |
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dc.contributor.author | Murthy, Madimatla Satyanarayana | - |
dc.date.accessioned | 2025-06-20T13:38:28Z | - |
dc.date.available | 2025-06-20T13:38:28Z | - |
dc.date.issued | 2015-05 | - |
dc.identifier.uri | http://localhost:8081/jspui/handle/123456789/16910 | - |
dc.description.abstract | The performance of the present day CMOS technology was drastically improved with the idea of scaling. But the drawbacks of scaling have forced the researchers to search for alternate low power technologies. Spintronics has emerged as a promising solution to the quest for lower power design. The discovery of spin transfer torque (STT) effect has revolutionized the field of spintronics and has given a new dimension to the information storage and processing in the last decade. Spin valve devices have been used to study the transport of spin polarized current through the channel. However, these devices were not suitable for any practical use in information processing and digital logic, in 2010, all spin logic devices (ASLDs) were introduced which used spin completely for information transfer. ASLDs use STT effect for writing the logic information on to the ferromagnets electrically. The spin torque switching is achieved at very low spin current using the architecture proposed in an ASLD. The major challenge associated with the spin transfer devices is to find the channel with high spin relaxation length and spin flip time. Many metals. semiconductors were examined over the years. Graphene provides many advantages over the other materials which were examined as the channel which include long relaxation times owing to the low atomic number which results in less spin orbit interaction, high Fermi velocity of the carriers, excellent mobility even at room temperature, and long spin relaxation lengths. Hence, graphene based ASLDs are analysed in this work. Most simulation tools cannot promisingly capture the ferromagnetic properties and spin transport simultaneously. Hence, the analysis of graphene based ASLDs is performed using the spin circuit model proposed for non local spin valve devices. The precisely defined architecture and design constraints are presented in this work. The clocked ASL copy and invert operations are demonstrated using the timing diagrams. The performance of proposed graphene channel ASLD is compared against metallic ASLD for same design constraints. | en_US |
dc.description.sponsorship | INDIAN INSTITUTE OF TECHNOLOGY ROORKEE | en_US |
dc.language.iso | en | en_US |
dc.publisher | IIT ROORKEE | en_US |
dc.subject | CMOS Technology | en_US |
dc.subject | Spin Transfer Torque | en_US |
dc.subject | All Spin Logic Devices | en_US |
dc.subject | Information processing | en_US |
dc.title | GRAPHENE BASED SPIN TRANSFER TORQUE DEVICES FOR ALL SPIN LOGIC APPLICATIONS | en_US |
dc.type | Other | en_US |
Appears in Collections: | MASTERS' THESES (E & C) |
Files in This Item:
File | Description | Size | Format | |
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G25147.pdf | 6.24 MB | Adobe PDF | View/Open |
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