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dc.contributor.authorKumar, Chandan-
dc.date.accessioned2025-06-01T07:37:51Z-
dc.date.available2025-06-01T07:37:51Z-
dc.date.issued2015-02-
dc.identifier.urihttp://localhost:8081/jspui/handle/123456789/16771-
dc.description.abstractFaults in power system results in a large short-circuit current which may damage power equipments. The fault current is suppressed using Fault Current Limiter (FCL). This thesis discusses modeling and simulation of saturated core type fault current limiter. The saturated core fault current limiter is inductive type fault current limiter (FCL) which is used to reduce fault current and protect the network. The saturated core type of FCL is superconducting type of FCL (SFCL). This particular type of FCL exhibits negligible power losses during the normal operation state. It also provides instantaneous reaction and recovery during fault events. SFCL exhibits high impedance at the time of fault which limits the fault current before first peak. This thesis gives detailed modeling and simulation of SFCL with the help of MATLAB and PSCAD.en_US
dc.description.sponsorshipINDIAN INSTITUTE OF TECHNOLOGY ROORKEEen_US
dc.language.isoenen_US
dc.publisherIIT ROORKEEen_US
dc.subjectSuperconducting Fault Current Limiteren_US
dc.subjectSaturated Core Fault Current Limiteren_US
dc.subjectHigh Temperature Superconductoren_US
dc.subjectLow Temperature Superconductoren_US
dc.titleMODELLING AND SIMULATION OF INDUCTIVE TYPE FAULT CURRENT LIMITERen_US
dc.typeOtheren_US
Appears in Collections:MASTERS' THESES (Electrical Engg)

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