IMPROVED SCHEMES FOR BUSBAR AND BREAKERFAILURE PROTECTION

Abstract

Electric power substations across the globe have undergone immense transitions in the past decade. With the introduction of state-of-art modern equipment and power elec- tronics overhaul, complexity of busbar con gurations has been signi cantly increased. Busbar in a substation, as a converging point of transmission lines and connection point of sophisticated equipment, requires meticulous and reliable protection. Though busbar faults are relatively fewer, the consequences are severe in terms of damaged equipment and widespread supply interruption. These repercussions alarm protection engineers about the need for reliable and secure busbar protection. The high MVA levels, ex- tensive interconnections, complex arrangements, and safety of connected equipment further necessitates faster operation of the busbar relay. Clearance of a busbar fault requires the opening of all line circuit breakers (CBs) connected to the busbar, which results in supply interruption in no small part of the power system. On the contrary, the consequences of an unprotected bus during a bus fault is catastrophic. The present practice is to reduce the fault clearance time of the relay rather than developing new arc extinction methods for the CBs. Hence, busbar protec- tion should be designed and implemented in such a way that it operates in every single instance of bus fault and avoids unwanted tripping because of any possible reason. Stability is another prime aspect while designing a bus zone relay as its mal-operation causes power outage to a large portion of the power system. Hence, bus protection is challenging in terms of reliability and speed. By implementing bus sectionalizers and duplicated bus arrangements, the part of the circuit to be interrupted can be minimized. An internal bus fault, in this case, disturbs only a smaller part of the substation and fewer components are a ected. Enhanced numerical data processing units introduce implementation of numerical relays into the area of busbar protection. They provide greater exibility and possible on-chip implementation of smart solutions. i Hence, choosing excellent mathematical analysis tools and algorithms has the utmost signi cance to provide highly reliable and fast busbar protection, which also ensures stable and secure operation of the entire grid. Further, to improve the system reliability, all the protection equipment are du- plicated at a substation. However, duplication of a CB is not suitable because of economic and functional constraints. A CB is monitored by Breaker-Failure Protec- tion (BFP) implemented as a supplementary function inside existing relays. For several years, power system engineering has provided realistic BFP as a local solution to high- voltage (HV) and EHV (EHV) systems. The role of BFP is to identify a failed breaker to interrupt current and to operate with a pre-de ned time delay. Owing to the lim- itations of current technology, such as inaccurate timers with slow-reset over-current elements, BFP has been historically seen as the main reason for mal-operation of large number of relays and subsequent blackout situations. Keeping the severe consequences of a busbar fault in mind, protection engineers try to clear the fault in the minimum possible time. This time must be within the critical fault clearance time as determined from the system stability point of view. With the shrinking of stability limits, a fast BFP function is more challenging to achieve. The total BFP time is decided from the worst-case scenarios of principal protection operating time, tripping time of primary breaker, and pickup/dropout time of BF threshold functions. Within the total BFP time of 10 - 12 cycles, often only one cycle is available for the BFP reset/response time in case of mal-operations. The recent developments in the eld of numerical re- laying, digital signal processing, and high-class Current Transformers (CTs) allow the implementation of improved BFP modules with substantial performance enhancement. The work presented in this thesis is concentrated upon the development of im- proved busbar and BFP techniques. In this work, using both numerical and statis- tical analysis such as LR, alpha plane characteristics, travelling wavefronts and dq- components, it has been demonstrated that the sensitivity and response speed of ex- isting busbar protection schemes can be improved. This work also emphasizes on the development of an integrated busbar and breaker-failure scheme that prevents the mal- operation from subsidence current. Furthermore, the probable on- eld implementation procedures and architectures of the proposed schemes has also been discussed in details.