DIGITAL LOGIC IMPLEMENTATION USING IN MEMORY BOOLEAN COMPUTATION

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DC Field	Value	Language
dc.contributor.author	Shrimali, Surbhi	-
dc.date.accessioned	2024-09-17T11:04:20Z	-
dc.date.available	2024-09-17T11:04:20Z	-
dc.date.issued	2019-06	-
dc.identifier.uri	http://localhost:8081/xmlui/handle/123456789/15669	-
dc.description.abstract	Since the invention of Moore’s law, a continuous downscaling of transistor sizing has become the main motivation to the growth of very large scale integration (VLSI) industry, but along with that, there is an increasing demand of speed and energy efficiency for computing applications. Over thirty years ago, Von Neumann architecture – a standard computer architecture - is being used for all the computing applications.	en_US
dc.description.sponsorship	INDIAN INSTITUTE OF TECHNOLOGY, ROORKEE	en_US
dc.language.iso	en	en_US
dc.publisher	I I T ROORKEE	en_US
dc.subject	Moore’s Law	en_US
dc.subject	very large Scale Integration (VLSI) Industry	en_US
dc.subject	Von Neumann Architecture	en_US
dc.subject	Computer Architecture	en_US
dc.title	DIGITAL LOGIC IMPLEMENTATION USING IN MEMORY BOOLEAN COMPUTATION	en_US
dc.type	Other	en_US
Appears in Collections:	MASTERS' THESES (E & C)

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