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http://localhost:8081/jspui/handle/123456789/15343| Title: | INVESTIGATION OF DEVICE ENGINEERED INNOVATIVE TUNNEL FETs FOR IMPROVED PERFORMANCES |
| Authors: | Bagga, Navjeet |
| Keywords: | Technological Development;Available Literature;Around Schottky Junction;Electrode |
| Issue Date: | Jun-2019 |
| Publisher: | I.I.T Roorkee |
| Abstract: | Technologicaldevelopmentofthesemiconductorindustryisprimarilydependedonthe miniaturization ofexistingCMOStechnologywithoutaffectingitsproperfunctionalityor in otherwords,morefunctionalityperunitareaofsilicon.However,thepowerconstraints and ever-increasingleakagecurrentinscaledtransistorshaspromptedtheresearchonin- ventivesteepslopedevices.Amongtheemergingdevices,TunnelFieldEffectTransistor (TFET) isoneofthemostpromisingandpotentialcandidateswhichcouldbeapossible successor toMOSFET.DuetothevirtueoflowOFFcurrentandsteepsubthresholdslope, TunnelFETscanbeusedforlowpowerapplications.Inspiteofhavingsuchadvantages, TunnelFETssufferfromtheproblemofambipolarconduction,lowONcurrentandhigher Miller capacitance.ManyliteratureshavereportedstructuralandmaterialengineeredTunnel FETs; however,extensiveresearchisstillrequiredforbetterdeviceperformance.Inorderto improvethedevicecharacteristics,wehaveproposedfourdistinctnovelTunnelFETstruc- tures inthisthesiswithproperphysicaljustifications,optimization,andcomparisonwiththe existingavailableliterature. WeproposedalinetunnelingbasedTwoSourceRegion(TSR)TunnelFETinwhich the effectivetunnelingoccursatthejunctionofthechannelandboththesourceregions. The proposeddeviceisasilicon-on-insulator(SOI)basedstructurethatcomprisesadrain pad overwhichboththesourceregionsandchannelareformed.Awell-calibratedsimula- tion setuphasbeenusedtoobtaintheresultsoftheproposedstructure.Wealsoexplained the possibleprocessflowtofabricatetheproposedstructure.Theacquiredresultsarecom- pared withtheearlierreportedL-shapedTunnelFETandwehavefound 63% reduction in turn-onvoltagewith 100 timesimprovementin ION=IOFF. Thedevicedimensionsand other parametersareoptimizedwithappropriatereasoningtoimprovetheperformanceof the proposeddevice. Literature surveyofTunnelFETssuggeststhatthepointtunnelingisnotadominant mechanism asitoccursonlyinthelocalizedareanearthesurface.Totakethisintocon- sideration, wehavechosenagate-all-aroundstructuretoimprovetheONcurrentincaseof point tunneling.WeproposedaGateAllAroundSchottkyJunctionTunnelFETwithHeav- ily DopedPocket(GAASJ-HDP)inwhichtheSchottkyJunctionhasbeenformedatthe source-channel interface.TheexistenceofSchottkyJunctionsupportstogetasteeptunnel- ing widthandinturn,increasethetunnelingcurrent.Theresultsoftheproposedstructure are comparedwithaconventionalgate-all-around(GAA)TunnelFETandwehavefound 15x improvementinONcurrent.Theimpactofheavilydopedpocket(HDP),stacked gate-oxideandchannellengthvariationintheproposedstructurehavealsobeendiscussed in detail.Furthermore,theconceptofunder-lapandthedualmetalgatehasbeenincluded in theproposedstructuretoinvestigatetheperformanceintermsofambipolarcurrent.In continuation, wedemonstratedaworkfunctionengineeredGateAllAroundTripleMetal (GAATM)TunnelFETwhichcomprisesofagateelectrodewiththreemetalsofdifferent i workfunctionconnectedincascade.Thechoiceofworkfunctionofthreedifferentmetals enhances theelectricfieldatthesource-channeljunctionwhichincreasestheONcurrent. Moreover,thedifferenceinworkfunctioncausesaformationofapotentialbarrierinthe channel whichobstructsthereversetunnelingandinturnreducestheambipolarcurrent.An analytical modeloftheproposeddevicehasbeenpresentedbyusingPoisson’sEquationand Kane’sModelandfoundtohaveagoodagreementwiththesimulationdata.Toemploythe device-circuitco-design,weproposedandinvestigatedanovelTwofoldTunnelFET(TF- TFET). TheproposedTF-TFETisanadmixtureofbothn-andp-typeTunnelFETsandthus a singledeviceactsasaninverter.Thisinturnreducesthetransistorcountindesigningof anycircuit.Thedrainregionofn-andp-typeTunnelFETsareshortedinternallywhichpro- vides anadditionalintrinsiccapacitancethatcomesinserieswiththeparasiticcapacitance of individualTunnelFET.Asaresult,wefound 4x reductionintheoverallMillercapac- itance ascomparedtotheMillercapacitanceofaconventionalTunnelFETbasedinverter. In addition,wehaveexploredthedynamicandstaticbehavioroftheTF-TFETinverterand also designedanXORgateand2:1MUXbyusingtheproposedTF-TFET.Inthisway,we haveacquiredthepossiblesolutionsbydemonstratingfourdistinctstructureswhichprovides better performancesofTunnelFETsintermsofhighONcurrent,lowambipolarcurrentand reduced Millercapacitance.Theoutlineoftheworksuggeststhattheproposeddevicescan be usefultothedeviceandcircuitengineerstoachieveimprovedperformancesofTunnel FET devices. |
| URI: | http://localhost:8081/xmlui/handle/123456789/15343 |
| Research Supervisor/ Guide: | Dasgupta, S. |
| metadata.dc.type: | Thesis |
| Appears in Collections: | DOCTORAL THESES (E & C) |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| G28745.pdf | 7.17 MB | Adobe PDF | View/Open |
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