POWER QUALITY IMPROVEMENT USING D-STATCOM

Abstract

In present day distribution systems, major power consumption has been in reactive loads, such as motor drives, fans, pumps and power electronic converters. These loads normally draw lagging power factor currents and therefore give rise to reactive power burden in the distribution system. Excessive reactive power demand results into low power factor, poor voltage regulation, increased feeder losses and reduced the active power flow capability of the distribution system. Moreover, the situation worsens in the presence of non-linear loads and raises power quality issues on the distribution system. The primary source that draw non-linear currents from the distribution systems are power electronic devices. The operation of these non-linear loads on distribution systems results into harmonics current burden and interrupts the normal operation of the electrical equipments that are connected to the distribution system. Nowadays, most of the equipments connected to the distribution system are based on power electronic devices, often leading to the problems of power quality. At the same time these equipments are typically equipped with sophisticated microprocessor based controllers which are quite sensitive to deviations of the voltage from its ideal waveform. In recent years, with the advent of sophisticated electrical and electronic equipment, the electric power quality (PQ) has become an issue of concern and extensive research is being carried out to improve the power quality. In the early days, synchronous condenser and mechanically switched capacitors and inductors were used for reactive power compensation. However, due to their slow response and mechanical wear and tear, the use of these devices is limited for the applications, where fast compensation is not needed. With the advent of the first generation of Flexible AC Transmission System (FACTS) devices, thyristor-controlled Static Var Compensators (SVCs) schemes made significant advances in reactive power compensation as these devices are fast in operation. Besides, smooth control of reactive power compensation is also obtained by these devices. Despite the attractive theoretical simplicity of the SVC schemes, their popularity has been hindered by a number of practical disadvantages such as large size of the capacitor and inductor banks, dependency of the reactive power compensation on operating voltage. With the remarkable progress of gate commutated semiconductor devices, attention has been focused on second generation FACTS devices, which are based on selfcommutated inverters. Among them, Static Synchronous Compensator (STATCOM) has attracted the attention of researches and power industries for reactive power compensation and voltage regulation in transmission systems. Further, harmonic regulations or guidelines such as IEEE 519-1992 and IEC 61000 are being applied to limit the current and voltage harmonic levels. To meet these requirements, the harmonics must be mitigated by using harmonic filters. Active and passive filters are used either together to form hybrid filters or separately to mitigate harmonics. ii Conventional power quality mitigation equipment can respond only to a particular power quality problem, and this fact has attracted the attention of power engineers to develop dynamic and adjustable solutions to power quality problems. One modern and very promising group of solutions that deals with load current and/or supply voltage imperfections is the Custom Power Devices (CPDs). CPDs rectify most of the distribution system problems and many of the existing compensation devices are being replaced by CPDs, thereby reducing the cost. The family of CPDs includes Distribution Static Synchronous Compensator (D-STATCOM), Dynamic Voltage Restorer (DVR) and Unified Power Quality Conditioner (UPQC) which is used for compensating the power quality problems in the current and/or voltage waveforms. Among these members, D-STATCOM is a shunt connected device, which takes care of the power quality problems in the current waveform. In this thesis, an attempt is made to develop a robust computer-controlled D-STATCOM for power quality improvement in 3P3W and 3P4W distribution systems. It is well known that high performance and cost effective inverter is a prerequisite for the realization of a D-STATCOM. These inverters can be broadly categorised into two classes, namely, Voltage Source Inverter (VSI) and Current Source Inverter (CSI). A critical comparison of the performance of VSI and CSI, when used as a power circuit of DSTATCOM is beyond the scope of this thesis. However, in the present work, VSI is considered as a power circuit for D-STATCOM as it has higher market penetration and a more noticeable development on VSI has taken place over the last decade, in comparison to CSI topologies. The high harmonic content of the output voltage makes basic six-pulse (twolevel) VSI impractical for direct use in high-power, medium-voltage applications. Instead of using filters and connecting several switching devices in series to achieve the required voltage level, several alternative solutions have been reported in the literature and can be broadly categorized into two groups: multipulse and multilevel inverters. The first one requires complex phase-shifting transformers and therefore, its application is limited to highpower, high-voltage systems. The second approach, Multilevel Inverters (MLI), uses the concept of addition of multiple small-voltage levels for achieving the required voltage level with the help of additional switching devices and few components like diodes or capacitors. This approach does not require complex phase shifting transformers and hence these topologies are best suited for medium-power applications. The common multilevel inverters topologies are Diode Clamped (DCMLI), Flying Capacitor (FCMLI) and Cascaded Multilevel Inverters (CMLI) or Modular Multilevel Cascade Inverters (MMCI). The selection of individual inverter topologies for D-STATCOM applications depends on their performance, cost, size and implementation issues. DCMLI topology seems to be the most suited for D-STATCOM applications. But, the large number of power components and voltage unbalance problem at higher levels limits the DCMLI for low-power rating applications. On the other hand, FCMLI has a natural voltage balancing operation and iii modular structure, but its application as a D-STATCOM is limited due to the requirement of a large number of capacitors and their pre-charging. In contrast, MMCI is one of the next generation multilevel inverters intended for high or medium-voltage power conversion without the requirement of line-frequency transformers. The MMCI is based on cascade connection of multiple single-phase H-bridge converter cells or chopper cells per leg. Among the members of MMCI, Single-Star Bridge Cell (SSBC) and Single-Delta Bridge Cell (SDBC) are characterized by the cascade connection of multiple single-phase H-bridge cells per leg. The least component requirement, low cost, modular structure, easy expansion to any number of levels, high fault tolerance and absence of complex input transformer and noninitialization of the capacitor voltages make SSBC and SDBC best suited for D-STATCOM applications. Both SSBC and SDBC can reach higher output voltages and power levels (13.8 kV, 30 MVA) with readily available medium-voltage semiconductor devices. The SSBC and SDBC inverters have found input transformerless applications such as STATCOM, Battery Energy Storage System (BESS) and DVR. In the present work, the application of MMCI is extended to D-STATCOM, intended for direct installation on a medium-voltage distribution system for reactive power compensation and harmonic elimination. Towards this goal, the SSBC based inverter configuration is chosen over SDBC as the number of converter-cells required for SDBC is 1.732 (= 3 ) times that required for SSBC. In order to control the output voltage of the inverter of D-STATCOM to act as a controllable current source, a suitable modulation technique is required for the SSBC inverter. Although a large number of modulation schemes for multilevel inverters have been reported in the literature for industrial applications, carrier based PWM schemes are still preferred because of their proven technology, simplicity and ease of implementation. The carrier based modulation schemes for multilevel inverters can be generally classified into two categories: phase-shifted PWM (PSPWM) and level-shifted PWM (LSPWM) techniques. The LSPWM technique produces the best harmonic performance, when compared with the PSPWM technique, but it does not cancel the current harmonics at the input side of the phase-shifting transformer. Nevertheless, because of the unequal device conduction periods of the LSPWM technique, has penetrated a smaller market even in those applications, where the transformer is not required at the input side, such as FACTS and CPDs, electric vehicle applications. The unequal device conduction periods affect the charging and discharging of the dc bus capacitors and cause non-uniform power and heat distribution in the inverter. To distribute the switching and conduction losses evenly, the switching patterns should be rotated. Such schemes for FCMLI have been given in the literature. In the present work, these switching schemes are extended to SSBC inverter. Towards this goal, two simple and effective ways of rotating the carrier signal are investigated for application to SSBC inverters, which imposes an even power distribution among the H-bridge cells. These are: iv 1. Rotation of the carrier signals at the end of each modulating cycle. 2. Rotation of the carrier signals at the end of each carrier cycle. In order to validate the performance of the carrier rotation techniques, simulation studies are carried out for 5- and 11-level SSBC based inverters in MATLAB/Simulink environment. From the simulation results, it is observed that line-to-line voltage, phase voltage and harmonic spectrum of line-to-line voltage for these carrier rotation techniques are identical to those produced by the basic LSPWM technique. In order to determine the device conduction periods of the carrier rotation techniques, the total conduction period of each device is calculated over a number of fixed modulating cycles. For this purpose detailed flowcharts of algorithms for calculating the device conduction periods are given in detail. By using these algorithms, total device conduction periods are calculated for 5-level and 11-level SSBC based inverters with various amplitude and frequency modulation indices. From these results it is observed that the device conduction periods are different for the basic LSPWM technique. However, with carrier rotation schemes, the device conduction periods are virtually equalized and as a result, the power loss and the heat distribution inside the inverter become quite uniform. Towards the goal of achieving harmonic elimination and reactive power compensation with D-STATCOM, an 11 kV three-phase, three-wire (3P3W) industrial distribution system is considered. To design an inverter for 11 kV system, generally the inverter must be equipped with a transformer for galvanic isolation and voltage matching between the industrial/utility distribution system voltage and the inverter voltage. However, weight and size of the transformer is normally more than 50% of the inverter. To alleviate this problem, the focus of this research is to design a SSBC based D-STATCOM without any line-frequency transformer. The cascade number (N, i.e. the number of cascaded voltage source H-bridge inverters in each phase) is one of the most important parameter for designing a transformerless PWM D-STATCOM. The value of N depends on the blocking voltage of the switching devices, cost, size and performance of the inverter. In the present work, IGBT is used as the switching device and further, a cascade number of N equal to 5 is chosen, considering the percentage total harmonic distortion (%THD), the dc voltage requirement and the voltage rating of the IGBT. For this D-STATCOM, a suitable value of reference dc voltage for each H-bridge cell is chosen. Ratings of various components of D-STATCOM such as dc capacitors for each Hbridge cell and inductance of coupling reactors are designed and carefully selected. The performance of D-STATCOM depends on the control algorithm used for its implementation. The control algorithm considered in this work aims to eliminate harmonics, compensate reactive power as well as control and balance all the dc capacitor voltages of the SSBC in steady-state as well as in transient conditions. The load harmonic currents are derived by using the measured voltages at the point of common coupling (PCC), load v currents and the dc bus voltages of the H-bridge cells of the SSBC using Instantaneous Reactive Power (IRP) theory. If the supply voltage is unbalanced and/or distorted, then the load harmonic currents derived from IRP theory are not accurate. Hence, for proper operation of D-STATCOM, the voltages at PCC are derived from the positive sequence voltage detector. In order to control the voltages of the floating dc capacitors of the 11-level SSBC based D-STATCOM, the dc voltage regulator is divided into two control blocks: (a) cluster voltage balancing control and (b) individual voltage balancing control. The former one calculates the total amount of real power required for balancing the three cluster voltages of the inverter and the later one calculates the total amount of real power required for balancing the voltages of the floating dc capacitors to their corresponding reference values. Simulation studies under different utility and load conditions are carried out to verify the performance of the 3P3W D-STATCOM for harmonic elimination and reactive power compensation. The simulation study of the entire system is carried out in the MATLAB/Simulink environment. A carrier rotation based LSPWM current controller is used to generate the gating signals for the IGBTs of the 11-level SSBC converter. Extensive simulation studies are carried out to investigate the performance of the D-STATCOM with an ideal and distorted voltage conditions. The simulation studies are performed for both steadystate and transient conditions with different non-linear and reactive loads. Further, the performance of the D-STATCOM is investigated with carrier rotation techniques and the capacitor voltage balance behaviour is observed among the individual dc capacitors of the DSTATCOM. Various performance indices such as THD, power factor, active and reactive powers and rating of the D-STATCOM are investigated. From these studies it is observed that the proposed control scheme completely compensates the reactive power of the load and makes the harmonic currents to be less and within the limits imposed by IEEE–519– 1992 standard. The three-phase, four-wire (3P4W) distribution systems have been widely employed to deliver electric power to single-phase and/or three-phase loads. The unbalanced and/or nonlinear single-phase loads on these systems can result into a high current flowing through the neutral conductor. The problems related to the excessive neutral current are: overloading of distribution feeders and transformers, common mode noise, flat-topping of the voltage waveform and wiring failure. Therefore, these excess neutral currents must be compensated for the reliable operation of the 3P4W distribution system. In recent years, a number of D-STATCOM schemes have been reported for simultaneous compensation of reactive power, source current harmonics and neutral current in 3P4W systems. They are: (a) three H-bridge topology (b) capacitor midpoint topology and (c) four-leg topology. However, these schemes require large volt-ampere (VA) rating of the inverter. Different transformer configurations such as zigzag, star-delta, T-connected, Scottconnected and star/hexagon-connected have also been used in recent years to attenuate the vi neutral current on the utility sides due to the advantages of low cost, high reliability and simplified circuit connection. Among these, zigzag transformer approach requires a least VA inverter rating. However, these configurations can reduce the source neural current to a great extent but it will not completely compensate the same. Further, their compensation characteristics are dependent on their locations, the impedances of the transformers and utility voltage conditions. To alleviate this problem, a reduced rating hybrid topology comprising of a zigzag-delta transformer, a 3P3W active power filter (APF) and a singlephase APF has been demonstrated for the compensation of source neutral current and phase current harmonics, but, no attempt has been made so far to improve the displacement power factor. Also, the fundamental-frequency phase currents are also not made balanced. Another reduced rating hybrid topology consisting of a single-phase APF and a zigzag transformer for neutral current compensation has been proposed in the literature for neutral current compensation. However, in this method, no attempt has been made to improve the displacement power factor and compensate the harmonics of source phase currents. To address the above limitations, in the present work, three reduced rating hybrid 3P4W DSTATCOMs are proposed. They are: 1. A 3P4W hybrid D-STATCOM comprising of a zigzag-delta transformer, 3P3W DSTATCOM and shunt connected single-phase APF. 2. A 3P4W hybrid D-STATCOM comprising of a T-connected transformer, 3P3W DSTATCOM and shunt connected single-phase APF. In these hybrid schemes, the functional capabilities of the existing schemes are enhanced to compensate the source current harmonics, reactive power and neutral current. For this purpose, a new control scheme is also proposed for generating the compensating currents for the D-STATCOM. To show the efficacy of the proposed control schemes, extensive simulation studies are carried out in the MATLAB/Simulink® environment. The performances of the proposed schemes are studied for reactive power compensation, harmonic elimination and neutral current compensation under various loading and utility operating conditions. From these studies it is observed that the proposed control schemes completely compensates the reactive power of the load and makes the harmonic currents to be reduced below the limits imposed by IEEE–519–1992 standard. Further, it also eliminates the source neutral current to a very large extent. In order to further verify the simulation studies, a three-phase downscaled SSBC based inverter is designed, developed and tested to verify the viability and effectiveness of the carrier rotation techniques as well as of the 3P3W D-STATCOM and 3P4W hybrid DSTATCOM arrangements. For this purpose, the following prototypes are developed. 1. Three-phase five-level SSBC based inverter. 2. Three-phase five-level SSBC based D-STATCOM. vii 3. A 3P4W hybrid D-STATCOM comprising of a zigzag-delta transformer, 3P3W DSTATCOM and shunt connected single-phase APF. To verify the control schemes experimentally, it is important to use an appropriate cascade number for realising the SSBC based D-STATCOM. The cascade number of N equal to 5 is definitely the best choice in terms of exact downscale. However, the inverter with N equal to 5 is challenging to design, construct and test in the laboratory (of the author). It is important to note that the control algorithm has no restriction on the cascade number and as a result the low value of N equal to 2 is used for realising the prototype D-STATCOM. With N equal to 2, the power circuit of the SSBC based D-STATCOM consists of 24 switching devices with the same voltage and current ratings. In the experimental set-up, IGBTs (IRG4PH40KD) are used as the switching devices. Different hardware components as required for the operation of the experimental set-up such as pulse amplification, isolation circuit, dead-band circuit, voltage and current sensor circuits and non-linear/reactive loads are designed and developed. By using the Real-Time Workshop (RTW) of MATLAB and Real-Time Interface (RTI) feature of dSPACE-DS1006, the Simulink models of the various controllers of the prototypes are implemented. The generated firing pulses are given to the corresponding semiconductor devices of each H-bridge of the inverter through isolation, delay and pulse amplification circuits in real-time. The developed power circuit is tested initially as a dc-ac inverter to experimentally validate the efficacy of the carrier rotation techniques. The required isolated dc supplies for the six H-bridges cells are realised by three single-phase, three-winding transformers (230/115/115 V, 3 kVA) with single-phase diode bridge rectifiers and filter capacitors. A three-phase lamp load is used as a load for the inverter. The firing pulse generation circuit of the inverter is implemented in dSPACE. The line-to-line voltage, phase voltage and their corresponding harmonic spectra are observed, and these are found to be almost identical with and without carrier rotation techniques. Subsequently, the developed prototype inverter is used as a D-STATCOM to verify the viability and effectiveness of the transformerless PWM D-STATCOM for harmonic elimination and reactive power compensation. In D-STATCOM implementation, each H-bridge cell is equipped with a galvanically isolated and floating dc capacitor without any power source or circuit. The IRP based controller of the D-STATCOM is implemented in dSPACE. An uncontrolled and a phase-controlled rectifier with RL and RC elements on their dc sides are used as non-linear loads. The developed prototype is further tested for reactive power compensation and harmonic elimination with different loading and utility voltage conditions. After compensation with D-STATCOM, the source currents are observed to be almost sinusoidal and their corresponding %THDs are also observed to be well within the limits of IEEE–519–1992 recommended value of 5%. The source displacement and power factors are found to be viii almost unity. The switching in response and the dynamic performance of D-STATCOM for a step change in the load is studied and in both cases, a smooth control of source current is achieved. A smooth control of dc voltages ensured the effectiveness of the dc voltage controller of the D-STATCOM. Further, the experimental results of the capacitor voltage balancing dynamics of the H-bridge cells with carrier rotation techniques are studied. The experimental results are found to be in good agreement with the simulation results. In order to further verify the simulation studies of the proposed hybrid 3P4W DSTATCOMs, laboratory prototypes of the adopted compensator topologies consisting of fivelevel SSBC based 3P3W D-STATCOM and a zigzag-delta transformer with single-phase APF are developed. The single-phase APF is realized by the same IGBTs, which are used in the three-phase inverter. The dc bus voltage of single-phase APF is maintained by using a regulated power supply. Three single-phase transformers of 3 kVA and 230/115/115 V rating are used to realize the zigzag-delta transformer. The control algorithms are implemented in the dSPACE DS1006 R&D controller. The developed prototypes are studied for reactive power compensation, harmonic elimination and neutral current compensation with different loading and utility conditions. From these studies it is observed that the proposed control schemes completely compensate the reactive power of the load and make the harmonic currents to be reduced below the limits imposed by IEEE–519–1992 standard. Further, the control algorithms also eliminate the source neutral current to a very large extent. It is also observed that the performance of these hybrid approaches are significantly improved under distorted/unbalance utility voltage conditions.